Colloid Aspects of Chemical-Mechanical Planarization by Matijević, E., Babu, S. E.

Subjects: “…silicon based logic and memory devices…”
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Energy-Efficient Non-Von Neumann Computing Architecture Supporting Multiple Computing Paradigms for Logic and Binarized Neural Networks by Tommaso Zanotti, Francesco Maria Puglisi, Paolo Pavan

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Reconfigurable Logic‐In‐Memory Cell Comprising Triple‐Gated Feedback Field‐Effect Transistors by Jongseong Han, Jaemin Son, Juhee Jeon, Yunwoo Shin, Kyoungah Cho, Sangsig Kim

Subjects: “…logic‐in‐memory…”
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Graphene Oxide-Based Memristive Logic-in-Memory Circuit Enabling Normally-Off Computing by Yeongkwon Kim, Seung-Bae Jeon, Byung Chul Jang

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Smart Logic-in-Memory Architecture for Low-Power Non-Von Neumann Computing by Tommaso Zanotti, Francesco Maria Puglisi, Paolo Pavan

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Logic-in-Memory Computation: Is It Worth it? A Binary Neural Network Case Study by Andrea Coluccio, Marco Vacca, Giovanna Turvani

Subjects: “…logic-in-memory (lim)…”
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Reconfigurable and Efficient Implementation of 16 Boolean Logics and Full‐Adder Functions with Memristor Crossbar for Beyond von Neumann In‐Memory Computing by Yujie Song, Xingsheng Wang, Qiwen Wu, Fan Yang, Chengxu Wang, Meiqing Wang, Xiangshui Miao

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Multi-Input Logic-in-Memory for Ultra-Low Power Non-Von Neumann Computing by Tommaso Zanotti, Paolo Pavan, Francesco Maria Puglisi

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Exploring Multi‐Bit Logic In‐Memory with Memristive HfO2‐Based Ferroelectric Tunnel Junctions by Wonwoo Kho, Hyunjoo Hwang, Seung‐Eon Ahn

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Towards a Strong Spin–Orbit Coupling Magnetoelectric Transistor by Peter A. Dowben, Christian Binek, Kai Zhang, Lu Wang, Wai-Ning Mei, Jonathan P. Bird, Uttam Singisetti, Xia Hong, Kang L. Wang, Dmitri Nikonov

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New Logic-In-Memory Paradigms: An Architectural and Technological Perspective by Giulia Santoro, Giovanna Turvani, Mariagrazia Graziano

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Investigation of PVT-Aware STT-MRAM Sensing Circuits for Low-VDD Scenario by Zhongjian Bian, Xiaofeng Hong, Yanan Guo, Lirida Naviner, Wei Ge, Hao Cai

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Modeling of RRAM With Embedded Tunneling Barrier and Its Application in Logic in Memory by Jia-Wei Lee, Meng-Hsueh Chiang

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A novel self write-terminated driver for hybrid STT-MTJ/CMOS LIM structure by Prashanth Barla, Vinod Kumar Joshi, Somashekara Bhat

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Ternary computing using a novel spintronic multi-operator logic-in-memory architecture by Amirhossein Fathollahi, Abdolah Amirany, Mohammad Hossein Moaiyeri

Subjects: “…Logic in memory…”
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Dual‐logic‐in‐memory implementation with orthogonal polarization of van der Waals ferroelectric heterostructure by Jingjie Niu, Sumin Jeon, Donggyu Kim, Sungpyo Baek, Hyun Ho Yoo, Jie Li, Ji‐Sang Park, Yoonmyung Lee, Sungjoo Lee

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Logic‐In‐Memory Characteristics of Reconfigurable Feedback Field‐Effect Transistors with Double‐Gated Structure by Yunwoo Shin, Jaemin Son, Juhee Jeon, Kyoungah Cho, Sangsig Kim

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Beyond Von Neumann Architectures: Exploring Algorithmic Opportunities via Octantis by Andrea Marchesin, Alessio Naclerio, Fabrizio Riente, Mariagrazia Graziano

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A Novel Low Power and Reduced Transistor Count Magnetic Arithmetic Logic Unit Using Hybrid STT-MTJ/CMOS Circuit by Prashanth Barla, Vinod Kumar Joshi, Somashekara Bhat

Subjects: “…Logic-in-memory…”
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Controlling Isomerization of Photoswitches to Modulate 2D Logic‐in‐Memory Devices by Organic–Inorganic Interfacial Strategy by Yongli Duan, Miaomiao Song, Fanxi Sun, Yi Xu, Fanfan Shi, Hong Wang, Yonghao Zheng, Chao He, Xilin Liu, Chen Wei, Xu Deng, Longquan Chen, Fucai Liu, Dongsheng Wang

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