Multi-Segment TFT Compact Model for THz Applications by Xueqing Liu, Trond Ytterdal, Michael Shur

“…We present an update of the Rensselaer Polytechnic Institute (RPI) thin-film transistor (TFT) compact model. The updated model implemented in Simulation Program with Integrated Circuit Emphasis (SPICE) accounts for the gate voltage-dependent channel layer thickness, enables the accurate description of the direct current (DC) characteristics, and uses channel segmentation to allow for terahertz (THz) frequency simulations. …”
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Research on the Force-Sensitive Characteristic of InAs QD Embedded in HEMT by Rui-Rong Wang, Hao Guo, Jun Tang, Jin-Ping Liu, Li-Shuang Liu

“…A force-sensitive structure of an InAs Quantum Dot (QD) embedded in a high electron mobility transistor (HEMT) is presented in this paper. The size of an InAs QD is about 30 nm prepared by the S-K growth mode, and the force-sensitive structure is fabricated by molecular beam epitaxy (MBE). …”
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<i>Ka</i>-Band Three-Stack CMOS Power Amplifier with Split Layout of External Gate Capacitor for 5G Applications by Junhyuk Yang, Jaeyong Lee, Seongjin Jang, Hayeon Jeong, Changkun Park

“…The layout of an external gate capacitor for the stacked power stage was split to maximize the performance of the power transistor. With the proposed split layout of the external capacitor, gain, output power, and power-added efficiency (PAE) were improved. …”
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Circuit simulation of floating-gate FET (FGFET) for logic application by Yunjae Kim, Hyoungsoo Kim, Jongwook Jeon, Seungjae Baik, Myounggon Kang

“…In this study, a floating-gate field-effect transistor (FGFET) structure is proposed and verified through simulations. …”
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Heterogeneous CMOS Integration of InGaAs-OI nMOSFETs and Ge pMOSFETs Based on Dual-Gate Oxide Technique by Xiaoyu Tang, Tao Hua, Yujie Liu, Zhezhe Han

“…The direct wafer bonding method was utilized to obtain the InGaAs-Insulator-Ge structure, providing the heterogeneous channels for CMOS integration. Superior transistor characteristics were achieved by optimizing the InGaAs gate oxide with a self-cleaning process in atomic layer deposition, and modifying the Ge gate oxide by the ozone post oxidation (OPO) technique, in the sequential two-step gate oxide fabrication process. …”
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Design of ternary full-adder and full-subtractor using pseudo NCNTFETs by SV RatanKumar, L Koteswara Rao, M Kiran Kumar

“…Now-a-days, the binary logic system has intensified by scaling the field effect transistor (FET). However, due to the effectiveness of scaling the FET, ternary logics became more popular. …”
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Unipolar Arc Ignited Partial Discharge for 650-V AlGaN/GaN HEMTs during the DC Breakdown Voltage Measurement by Jian-Hsing Lee, Chih-Cherng Liao, Yeh-Jen Huang, Ching-Ho Li, Li-Yang Hong, Yeh-Ning Jou, Ke-Horng Chen

“…Without the Fluorinert solution and proper pad design, the high–voltage (HV) transistor used during the DC breakdown voltage (V_bk) measurement might be damaged by the partial discharge (PD) in the air if its V_bk is close to one thousand volts or more. …”
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Macro–Mesoscale Modeling of the Evolution of the Surface Roughness of the Al Metallization Layer of an IGBT Module during Power Cycling by Tong An, Xueheng Zheng, Fei Qin, Yanwei Dai, Yanpeng Gong, Pei Chen

“…One of the main failure modes of an insulated-gate bipolar transistor (IGBT) module is the reconstruction of an aluminum (Al) metallization layer on the surface of the IGBT chip. …”
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Printed Soft Sensor with Passivation Layers for the Detection of Object Slippage by a Robotic Gripper by Reo Miura, Tomohito Sekine, Yi-Fei Wang, Jinseo Hong, Yushi Watanabe, Keita Ito, Yoshinori Shouji, Yasunori Takeda, Daisuke Kumaki, Fabrice Domingues Dos Santos, Atsushi Miyabo, Shizuo Tokito

“…An amplifier circuit, based on a printed organic thin-film transistor, was applied and achieved a high sensitivity of 0.1 cm²/V·s. …”
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Gate-modulated thermopower in disordered nanowires: I. Low temperature coherent regime by Riccardo Bosisio, Geneviève Fleury, Jean-Louis Pichard

“…Using a one-dimensional tight-binding Anderson model, we study a disordered nanowire in the presence of an external gate which can be used for depleting its carrier density (field effect transistor device configuration). In this first paper, we consider the low temperature coherent regime where the electron transmission through the nanowire remains elastic. …”
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Efficiency analysis of the SVPWM control using the simulink electrical library and implemented in the Lucas Nulle practice modules by Franklin Israel Sánchez-Gamboa

“…It is carried out by applying the mathematical model, the formulas for commutation times and space vectors in Simulink taking into account the maximum and minimum values of operation by applying the SVPWM method to generate the trigger signal in the Insulated Gate Bipolar Transistor bridge. (IGBT's), implementing the model in the Lucas Nulle practice module, taking the power data and calculating the efficiency to compare with the mathematical model and validate, resulting that the controller efficiency varies according to the switching speed of the semiconductor block, with the operation of a motor of 0.37kW and 1KW at a speed of 200rpm the efficiency of the controller reaches a value of 72.67% in the physical model that consists of 6 IGBT's of 1 kVA and 69% in the simulated model presenting an error of 5% and a switching speed of the IGBT's of 248.641ms. …”
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A 6 GHz Integrated High-Efficiency Class-F⁻¹ Power Amplifier in 65 nm CMOS Achieving 47.8% Peak PAE by Syed Muhammad Ammar Ali, S. M. Rezaul Hasan

“…This paper reports a “single-transistor” Class-F⁻¹ power amplifier (PA) in 65 nm CMOS, which operates at the microwave center frequency of 6 GHz. …”
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The Image Identification Application with HfO₂-Based Replaceable 1T1R Neural Networks by Jinfu Lin, Hongxia Liu, Shulong Wang, Dong Wang, Lei Wu

“…This paper mainly studies the hardware implementation of a fully connected neural network based on the 1T1R (one-transistor-one-resistor) array and its application in handwritten digital image recognition. …”
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Characteristic Analysis of AlGaN/GaN HEMT with Composited Buffer Layer on High-Heat Dissipation Poly-AlN Substrates by Chong-Rong Huang, Hsien-Chin Chiu, Chia-Hao Liu, Hsiang-Chun Wang, Hsuan-Ling Kao, Chih-Tien Chen, Kuo-Jen Chang

“…In this study, an AlGaN/GaN high-electron-mobility transistor (HEMT) was grown through metal organic chemical vapor deposition on a Qromis Substrate Technology (QST). …”
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Matlab-Based Design Consideration of Series ZVS Single-Ended Resonant DC-DC Converter by Nikolay Hinov, Bogdan Gilev

“…The paper presents a model-based design consideration of a series single-ended transistor resonant DC-DC converter with zero voltage switching (ZVS). …”
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LTPS TFTs with an Amorphous Silicon Buffer Layer and Source/Drain Extension by Hye In Kim, Jung Min Sung, Hyung Uk Cho, Yong Jo Kim, Young Gwan Park, Woo Young Choi

“…A low leakage poly-Si thin film transistor (TFT) is proposed featuring hydrogenated amorphous silicon (a-Si:H) buffer layer and source/drain extension (SDE) by using technology computer aided design (TCAD) simulation. …”
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Modelling of Impulsional pH Variations Using ChemFET-Based Microdevices: Application to Hydrogen Peroxide Detection by Abdou Karim Diallo, Lyes Djeghlaf, Jerome Launay, Pierre Temple-Boyer

“…This work presents the modelling of impulsional pH variations in microvolume related to water-based electrolysis and hydrogen peroxide electrochemical oxidation using an Electrochemical Field Effect Transistor (ElecFET) microdevice. This ElecFET device consists of a pH-Chemical FET (pH-ChemFET) with an integrated microelectrode around the dielectric gate area in order to trigger electrochemical reactions. …”
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Modeling Power GaN-HEMTs Using Standard MOSFET Equations and Parameters in SPICE by Utkarsh Jadli, Faisal Mohd-Yasin, Hamid Amini Moghadam, Peyush Pande, Mayank Chaturvedi, Sima Dimitrijev

“…The device library in the standard circuit simulator (SPICE) lacks a gallium nitride based high-electron-mobility-transistor (GaN-HEMT) model, required for the design and verification of power-electronic circuits. …”
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Low-Power Phase Frequency Detector Using Hybrid AVLS and LECTOR Techniques for Low-Power PLL by Belegehalli Siddaiah Premananda, Srivaths Sreedhar

“…A power reduction of up to 32% has been observed while keeping the transistor count to a minimum.…”
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Theoretical and Experimental Substractions of Device Temperature Determination Utilizing I-V Characterization Applied on AlGaN/GaN HEMT by Martin Florovič, Jaroslav Kováč, Aleš Chvála, Jaroslav Kováč, Jean-Claude Jacquet, Sylvain Laurent Delage

“…An ambient temperature variation method has been used to determine device average temperature under quasi-static state and pulse operation, was compared with respect to the threshold voltage shift of a high-electron-mobility transistor (HEMT). The experimental sections presents theoretical subtractions of average channel temperature determination including trapping phenomena adapted for the AlGaN/GaN HEMT. …”
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