Counter-checking uncertainty calculations in Bayesian operational modal analysis with EM techniques by Ma, Xinda, Au, Siu-Kui

“…In the absence of analytical or numerically ‘exact’ result for benchmarking, computer code verification during development stage is also non-trivial. …”
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Computation fluid dynamics on drag reduction II by Zang, Bin

“…In this project, a number of Reynolds-Average Navier-Stokes (RANS) models are verified with benchmark values of Direct Numerical Solutions (DNS) provided by the past research to identify appropriate RANS models which allow the simulation of dimpled flow with specific Reynolds number and initial conditions in a 3D channel. …”
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Verifying Correctness of the Number Theoretic Transform and Fast Number Theoretic Transform in F⋆ by Ono, Rick R.

“…As engineers continue to develop more sophisticated algorithms to optimize cryptographic algorithms, their often simple mathematical specifications become convoluted in the algorithms, from which a class of correctness bugs arise. …”
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A Formal Framework for Modular Synchronous System Design by Marinescu, Maria-Cristina V, Rinard, Martin C

“…Our compiler automatically transforms modular and asynchronous specifications of circuits written in our specification language, into tightly coupled, fully synchronous implementations in synthesizable Verilog. …”
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Generate vascularized kidney organoids for studying kidney development by Zhang, Tian

“…Overall, hPSCs-derived kidney organoids offer new avenues for studying renal lineage specification, as well as for disease modeling in an organ-specific manner.…”
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Ellipsometry studies on anodic aluminium oxide (AAO)growth mechanism on high purity aluminium plate by Lim, Leng Khoon

“…Such study would useful to control the required specification of the microstructure. Thickness increases together with voltage, time and temperature where these parameters are the contributing factors to the rate of anodizing. …”
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Data-driven dynamic logic for low power adders and multipliers by Mahendiran Navasakthi

“…These circuits are designed and simulated using Cadence Virtuoso in TSMC 65nm specification. The propagation delay and power of each logic is calculated and compared. …”
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Tooling cost estimation model for injection molding by Tran, Duc Vi, Wang, Lan, Zhu, ZhiQiang, Padmanaban Ranganathan

“…In addition, two case studies in which data come from the current injection molding toolmaker in Singapore have been applied as model verification.…”
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Implementation of a radar prototype on an unmanned arial vehicle by Liu, Jiaqing

“…In the part of system integration, it further covers aspects like RF testing and measurement for different parts of the system, verification of choice of components, power budget and payload distribution for UAV. …”
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Leveraging Multi-Stage Machine Learning Pipelines for Extracting Structured Key-Value Pairs from Documents by Pyo, Bryan

“…This thesis discusses several pipelines that have been developed to extract data in the form of key-value pairs from specification sheets describing mechanical parts achieving accuracies ranging from 80% to 100% depending on the pipeline and the target documents and key-value pairs.…”
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Analysis and characterization of nervous system defects in candidate mutations resulting from a mutagenesis screen in the fruit fly, Drosophila melanogaster by Joanita Jasmen

“…Overall, the mutations generated were not found to be directly implicated to DA neuron fate specification as tyrosine hydroxylase (TH) expression pattern remained unaffected.…”
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Channelized coinShuffle++ : practical unlinkability in the ethereum blockchain by Xiong, Luoyuan

“…A complete system specification and theoretical evaluation will be provided while the actual experimental the result will appear in a future update once an end-to-end Proof of Concept is built.…”
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QUCS-S: a central tool in the openPDK IC design flow by Brinson, Mike

“…The release by IHP-GmbH in September 2023, of a Process Design Kit (PDK) specification for a 130nm BiCMOS process provides IC designers access to an open source PDK for analog, digital mixed signal and RF IC Design. …”
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Big data analytics and automation in post-silicon by Wang, Yifei

“…This paper presents the authors’ knowledge of silicon post-processing during their internship at MediaTek and the verification of how to solve the problems of high manual mechanical workload, low efficiency, and high error rate in this field. …”
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Metacognitive strategy in solving mathematics problems, learning approach and mathematics achievement of students from a junior college by Lo, Chee Lin.

“…Orientation, Organisation, Execution and Verification Strategies, and learning approaches, i.e. …”
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A web-based computer-program grading system by Zhu, Wu.

“…The first phase focuses on developing a web portal to accept programming course assignment submission according to problems set by instructors and conduct verification on submitted source code by running through test cases. …”
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Programming language implementations with multiparty session types by Yoshida, N

“…We also survey MPST implementations with dynamic (runtime) verification which target active object programming languages.…”

Incentivizing consensus propagation in proof-of-stake based consortium blockchain networks by Kang, Jiawen, Xiong, Zehui, Niyato, Dusit, Wang, Ping, Ye, Dongdong, Kim, Dong In

“…When the puzzle is solved, the miners are encouraged to take part in mined block propagation for verification to win a transaction fee from the blockchain user. …”
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Component-based security under partial compromise by Dehnel-Wild, M

“…During design and implementation, the foremost of these is formal verification. Large, real-world systems and protocols made up of multiple computers or components are rarely designed with verification or analysis in mind. …”

High-level automatic pipelining for sequential circuits by Marinescu, Maria-Cristina V, Rinard, Martin

“…Our experimental results show that, starting with a non-pipelined or insufficiently pipelined specification, this synthesizer can effectively reduce the clock cycle time and improve the throughput of the generated circuit.…”
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