Showing 81 - 100 results of 8,802 for search '(((bee OR (beens OR ten)) OR (bee OR speeds)) OR bear)', query time: 0.17s Refine Results
  1. 81

    The relationship between the moderate–heavy boundary and critical speed in running by Hunter, Ben, Meyler, Samuel, Maunder, Ed, Cox, Tobias H., Muniz-Pumares, Daniel

    Published 2024
    “…While estimates of the heavy- and severe-intensity boundary, that is, the critical speed (CS), can be derived from habitual training, determining the moderate–heavy boundary or first threshold (T1) requires testing, which can be costly and time-consuming. …”
    Get full text
    Article
  2. 82
  3. 83
  4. 84

    Load‑bearing behaviors of sandwich plates with non‑uniformly distributed grid cores : Static compression and bending by Hao, Ning, Wang, Youlong, Song, Yiheng, Ruan, Sihan, Quanjin, Ma, Wang, Ziying

    Published 2023
    “…Under bending loading, most NUGPs experience local failure at the loading head, while the specific category surpassing GPs undergoes shear buckling in longer grid walls. (3) Deformation modes of the core layer, mechanical analysis, thin plate buckling theory, and equivalent bending stiffness calculations elucidate the load-bearing mechanisms of NUGPs. These findings enhance topology optimization research for sandwich plates, provide guidance for grid wall arrangements under different loading conditions, and offer insights for designing lightweight sandwich structures.…”
    Get full text
    Get full text
    Article
  5. 85

    Speeding up deep neural network training with decoupled and analytic learning by Zhuang, Huiping

    Published 2021
    “…The BP requires a sequential passing of activations and gradients, which has been recognized as lockings (i.e., the forward, backward, and update lockings). …”
    Get full text
    Thesis-Doctor of Philosophy
  6. 86
  7. 87
  8. 88
  9. 89
  10. 90

    High-speed cruise missiles in Asia : evolution or revolution in fire power? by Kalyan M Kemburi

    Published 2014
    “…Recent reports indeicated that China has successfully tested a hypersonic system - a potential precursor for a high-speed cruise missile. What is the role of high-speed cruise missiles in providing firepower for land-attack missions?…”
    Get full text
    Get full text
    Commentary
  11. 91

    Pipelined adder graph optimization for high speed multiple constant multiplication by Kumm, Martin, Zipf, Peter, Faust, Mathias, Chang, Chip Hong

    Published 2013
    “…This paper addresses the direct optimization of pipelined adder graphs (PAGs) for high speed multiple constant multiplication (MCM). The optimization opportunities are described and a definition of the pipelined multiple constant multiplication (PMCM) problem is given. …”
    Get full text
    Get full text
    Conference Paper
  12. 92

    Higher-order sliding mode observer for speed and position estimation in PMSM by Kommuri, Suneel K., Veluvolu, Kalyana C., Defoort, M., Soh, Yeng C.

    Published 2014
    “…This paper presents a speed and position estimation method for the permanent magnet synchronous motor (PMSM) based on higher-order sliding mode (HOSM) observer. …”
    Get full text
    Get full text
    Journal Article
  13. 93

    Design of high speed advanced encryption standard (AES) encryption circuit by Li, Lantian

    Published 2022
    “…The proposed optimized high-speed 128-bit AES encryption circuit has a throughput about 5 times higher than the standard design.…”
    Get full text
    Thesis-Master by Coursework
  14. 94
  15. 95
  16. 96
  17. 97
  18. 98

    Investigation into the effect of process parameter on properties of AM parts - scan speed by Lau, Marilyn Li Qin

    Published 2016
    “…An experiment was conducted to investigate the influence of the laser scan speed on the mechanical properties of the printed parts.…”
    Get full text
    Final Year Project (FYP)
  19. 99

    High speed low power CMOS data compressor design and analysis by Radhakrishnan, Sathiya Priyanka

    Published 2019
    “…This dissertation aims in studying and analysing of lower power high-speed CMOS circuit for which full adder of different topologies are constructed to finally cascade it to form 4:2 and 8:2 CMOS data compressor. …”
    Get full text
    Thesis
  20. 100

    An enhanced low-power high-speed adder for error-tolerant application by Zhu, Ning, Goh, Wang Ling, Yeo, Kiat Seng

    Published 2010
    “…It not only consumes a lot of power but degrades the speed performance. By adopting an emerging concept in VLSI design and test—Error- Tolerance (ET), we managed to develop a novel Error-Tolerant Adder which we named the Type II (ETAII). …”
    Get full text
    Get full text
    Get full text
    Conference Paper