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Showing 1 - 20 results of 87 for search '(all OR (bill OR hall)) (dragos OR ((amos OR cmos) OR dragna))*', query time: 0.18s Refine Results
  1. 1
    Nickel-silicided Schottky junction CMOS transistors with gate-all-around nanowire channels

    Nickel-silicided Schottky junction CMOS transistors with gate-all-around nanowire channels by Tang, L. J., Ho, C. K. F., Tan, Eu Jin, Pey, Kin Leong, Singh, Navab, Lo, Guo-Qiang, Chi, Dong Zhi, Chin, Yoke King, Lee, Pooi See

    Published 2012
    “…We demonstrate high-performance Schottky CMOS transistors with NiSi source/drain and gate-all-around (GAA) silicon nanowire (~5 nm) channels. …”
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    Journal Article
  2. 2
    A crosstalk-immune sub-THz All-surface-wave I/O transceiver in 65-nm CMOS

    A crosstalk-immune sub-THz All-surface-wave I/O transceiver in 65-nm CMOS by Liang, Yuan, Boon, Chirn Chye, Yu, Hao

    Published 2020
    “…A surface-wave I/O transceiver is proposed and validated at 140 GHz in 65 nm CMOS. By generating, modulating and propagating surface plasmonic signal, the all-surface-wave I/O is prototyped with crosstalk-immune owning to the sub-wavelength localization of electromagnetic wave at the metal/dielectric interface. …”
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    Conference Paper
  3. 3
    CMOS millimeter-wave transmitter design

    CMOS millimeter-wave transmitter design by Lin, Jiafu

    Published 2016
    “…On-chip compact power combiner with high isolation of 28.3 dB at 40 GHz has also been demonstrated for further development of transmitter. All those proposed ideas and demonstrations can be employed in efficient CMOS millimeter circuit design. …”
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    Thesis
  4. 4
    Low power CMOS parallel prefix adders

    Low power CMOS parallel prefix adders by Yang, Shaochen

    Published 2013
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    Thesis
  5. 5
    Low power dual mode CMOS logic

    Low power dual mode CMOS logic by Lei, Yuze

    Published 2014
    “…This is achieved with a simple and intuitive design concept.I use the software “Cadence” to compare performance, power dissipation, and speed of the presented DML gates to their CMOS and domino.The DML gates,CMOS and domino what have been mentioned above are all consisted of the NAND gate in this paper.…”
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    Final Year Project (FYP)
  6. 6
    Circuit performance and sensitivity analysis of CMOS phase detectors

    Circuit performance and sensitivity analysis of CMOS phase detectors by Soe Moe.

    Published 2008
    “…All the simulations are based on Chartered Semiconductor Manufacturing Ltd. …”
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    Thesis
  7. 7
    16-bit low-power CMOS multiplier IC design

    16-bit low-power CMOS multiplier IC design by Zhang, Jingyao

    Published 2021
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    Thesis-Master by Coursework
  8. 8
    High speed low power CMOS data compressor design and analysis

    High speed low power CMOS data compressor design and analysis by Radhakrishnan, Sathiya Priyanka

    Published 2019
    “…These schematic simulations are done in Cadence Virtuoso software with TSMC 40nm technology library and the results are studied and concluded saying transmission gate, dynamic logic and 10T XOR gates show better results among all in which transmission gate logic showed good performance results used to construct 4:2 and 8:2 CMOS data compressor.…”
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    Thesis
  9. 9
    Low voltage CMOS operational amplifier design towards maximum CMR

    Low voltage CMOS operational amplifier design towards maximum CMR by Tan, Chee Lam.

    Published 2008
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    Thesis
  10. 10
    A CMOS ISFET interface circuit with dynamic current temperature compensation technique

    A CMOS ISFET interface circuit with dynamic current temperature compensation technique by Chan, Pak Kwong, Chen, D. Y.

    Published 2009
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    Journal Article
  11. 11
    Fully-integrated CMOS building blocks for phase-locked loops in the multi-GHz range

    Fully-integrated CMOS building blocks for phase-locked loops in the multi-GHz range by Yu, Xiaopeng

    Published 2008
    “…The objective of this project is to design the most critical building blocks for the multi-GHz frequency synthesizers. All proposed circuits are realized on cost effective CMOS technology. …”
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    Thesis
  12. 12
    A CMOS analog front-end IC for portable EEG/ECG monitoring applications

    A CMOS analog front-end IC for portable EEG/ECG monitoring applications by Ng, K. A., Chan, Pak Kwong

    Published 2009
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    Journal Article
  13. 13
    CMOS image sensor based physical unclonable function for smart phone security applications

    CMOS image sensor based physical unclonable function for smart phone security applications by Cao, Yuan, Zalivaka, Siarhei S., Zhang, Le, Chang, Chip-Hong, Chen, Shoushun

    Published 2015
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    Conference Paper
  14. 14
    An ultra low-power CMOS EMG amplifier with high efficiency in operation frequency per power

    An ultra low-power CMOS EMG amplifier with high efficiency in operation frequency per power by Jaya, Gibran Limi, Chan, Pak Kwong

    Published 2010
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    Conference Paper
  15. 15
    A high-sensitivity potentiometric 65-nm CMOS ISFET sensor for rapid E. coli screening

    A high-sensitivity potentiometric 65-nm CMOS ISFET sensor for rapid E. coli screening by Jiang, Yu, Liu, Xu, Dang, Tran Chien, Huang, Xiwei, Feng, Hao, Zhang, Qing, Yu, Hao

    Published 2020
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    Journal Article
  16. 16
    An in-pixel gain amplifier based event-driven physical unclonable function for CMOS dynamic vision sensors

    An in-pixel gain amplifier based event-driven physical unclonable function for CMOS dynamic vision sensors by Wang, Biyin, Zhao, Xiaojin, Zheng, Yue, Chang, Chip-Hong

    Published 2020
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    Conference Paper
  17. 17
    Miniaturized 3-bit phase shifter for 60 GHz phased-array in 65 nm CMOS technology

    Miniaturized 3-bit phase shifter for 60 GHz phased-array in 65 nm CMOS technology by Meng, Fanyi, Ma, Kaixue, Yeo, Kiat Seng, Xu, Shanshan, Boon, Chirn Chye, Lim, Wei Meng

    Published 2013
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    Journal Article
  18. 18
    Ultra low-voltage low-power CMOS 4-2 and 5-2 compressors for fast arithmetic circuits

    Ultra low-voltage low-power CMOS 4-2 and 5-2 compressors for fast arithmetic circuits by Chang, Chip Hong, Gu, Jiang Min, Zhang, Mingyan

    Published 2009
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    Journal Article
  19. 19
    A CMOS balun with common ground and artificial dielectric compensations applied in a wideband RF front-end

    A CMOS balun with common ground and artificial dielectric compensations applied in a wideband RF front-end by Yang, Geliang, Tang, Kai, Wang, Zhigong

    Published 2023
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    Journal Article
  20. 20
    A dual-loop clock and data recovery circuit with compact quarter-rate CMOS linear phase detector

    A dual-loop clock and data recovery circuit with compact quarter-rate CMOS linear phase detector by Tan, Yung Sern, Yeo, Kiat Seng, Boon, Chirn Chye, Do, Manh Anh

    Published 2013
    “…Meanwhile, it has the least number of output signals among all the other linear PDs with UP pulse-widening technique. …”
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    Journal Article

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