A systolic array for convolution /

Slični predmeti

• Implementation of full systolic-array architecture on FPGA for image filtering application /
  od: Tew, Yan Fen, 1991-, i dr.
  Izdano: (2015)
• VLSI architectures for dynamic time warping using systolic arrays /
  od: 318625 Jutand, F., i dr.
• Implementation of full systolic-array architecture on FPGA for image filtering application [electronic resource] /
  od: Tew, Yan Fen, 1991-, i dr.
  Izdano: (2015)
• Hardware acceleration of 2D convolution using systolic array /
  od: Wong, Xue Yuan, 1991-, author, i dr.
  Izdano: (2015)
• Hardware acceleration of 2D convolution using systolic array [electronic resource] /
  od: Wong, Xue Yuan, 1991-, author
  Izdano: (2015)