Reconfigurable address generation unit for 2D correlation in FPGA /

Схожие документы

• Reconfigurable address generation unit for 2D correlation in FPGA [electronic resource] /
  по: Heng, Ai Hoon, 1982-
  Опубликовано: (2012)
• FPGA implementation a reconfigurable address generation unit for image processing applications /
  по: Kam, Kok Horng, 1985-, и др.
  Опубликовано: (2013)
• FPGA implementation a reconfigurable address generation unit for image processing applications [electronic resource] /
  по: Kam, Kok Horng, 1985-
  Опубликовано: (2013)
• A High speed 2D convolution hardware module for image processing applications in hardware /
  по: Baba, Beenal 1982-, и др.
  Опубликовано: (2013)
• FPGA implementation of image processing 2D convolution for spatial filter /
  по: Ng, Bee Yee, 1976-, и др.
  Опубликовано: (2012)