Digital System Design With SystemVerilog /
To design state-of-the-art digital hardware, engineers first specify functionality in a high-level Hardware Description Language (HDL) and todays most powerful, useful HDL is SystemVerilog, now an IEEE standard.Digital System Design with SystemVerilogis the first comprehensive introduction to both S...
| Main Author: | |
|---|---|
| Format: | |
| Language: | eng |
| Published: |
Upper Saddle River, NJ : Addison-Wesley,
2010
|
| Subjects: |
| _version_ | 1796745203549208576 |
|---|---|
| author | Zwolinski, Mark, author 327189 |
| author_facet | Zwolinski, Mark, author 327189 |
| author_sort | Zwolinski, Mark, author 327189 |
| collection | OCEAN |
| description | To design state-of-the-art digital hardware, engineers first specify functionality in a high-level Hardware Description Language (HDL) and todays most powerful, useful HDL is SystemVerilog, now an IEEE standard.Digital System Design with SystemVerilogis the first comprehensive introduction to both SystemVerilog and the contemporary digital hardware design techniques used with it. Building on the proven approach of his bestselling Digital System Design with VHDL, Mark Zwolinski covers everything engineers need to know to automate the entire design process with SystemVerilog from modeling through functional simulation, synthesis, timing simulation, and verification. Zwolinski teaches through about a hundred and fifty practical examples, each with carefully detailed syntax and enough in-depth information to enable rapid hardware design and verification. All examples are available for download from the book's companion Web site, zwolinski.org. |
| first_indexed | 2024-03-05T12:37:26Z |
| format | |
| id | KOHA-OAI-TEST:482502 |
| institution | Universiti Teknologi Malaysia - OCEAN |
| language | eng |
| last_indexed | 2024-03-05T12:37:26Z |
| publishDate | 2010 |
| publisher | Upper Saddle River, NJ : Addison-Wesley, |
| record_format | dspace |
| spelling | KOHA-OAI-TEST:4825022022-02-17T06:24:15ZDigital System Design With SystemVerilog / Zwolinski, Mark, author 327189 Upper Saddle River, NJ : Addison-Wesley,2010©2010engTo design state-of-the-art digital hardware, engineers first specify functionality in a high-level Hardware Description Language (HDL) and todays most powerful, useful HDL is SystemVerilog, now an IEEE standard.Digital System Design with SystemVerilogis the first comprehensive introduction to both SystemVerilog and the contemporary digital hardware design techniques used with it. Building on the proven approach of his bestselling Digital System Design with VHDL, Mark Zwolinski covers everything engineers need to know to automate the entire design process with SystemVerilog from modeling through functional simulation, synthesis, timing simulation, and verification. Zwolinski teaches through about a hundred and fifty practical examples, each with carefully detailed syntax and enough in-depth information to enable rapid hardware design and verification. All examples are available for download from the book's companion Web site, zwolinski.org.Includes bibliographical references and index.To design state-of-the-art digital hardware, engineers first specify functionality in a high-level Hardware Description Language (HDL) and todays most powerful, useful HDL is SystemVerilog, now an IEEE standard.Digital System Design with SystemVerilogis the first comprehensive introduction to both SystemVerilog and the contemporary digital hardware design techniques used with it. Building on the proven approach of his bestselling Digital System Design with VHDL, Mark Zwolinski covers everything engineers need to know to automate the entire design process with SystemVerilog from modeling through functional simulation, synthesis, timing simulation, and verification. Zwolinski teaches through about a hundred and fifty practical examples, each with carefully detailed syntax and enough in-depth information to enable rapid hardware design and verification. All examples are available for download from the book's companion Web site, zwolinski.org.MJIITLVerilog (Computer hardware description language)Electronic digital computersComputer simulationURN:ISBN:9780137045792 |
| spellingShingle | Verilog (Computer hardware description language) Electronic digital computers Computer simulation Zwolinski, Mark, author 327189 Digital System Design With SystemVerilog / |
| title | Digital System Design With SystemVerilog / |
| title_full | Digital System Design With SystemVerilog / |
| title_fullStr | Digital System Design With SystemVerilog / |
| title_full_unstemmed | Digital System Design With SystemVerilog / |
| title_short | Digital System Design With SystemVerilog / |
| title_sort | digital system design with systemverilog |
| topic | Verilog (Computer hardware description language) Electronic digital computers Computer simulation |
| work_keys_str_mv | AT zwolinskimarkauthor327189 digitalsystemdesignwithsystemverilog |