Process parameter optimization of a 30nm junction-less nanowire transistor for low leakage current /

Bibliographic Details
Main Authors: Muhammad Faidzal Mohamad Rasol, author, Razali Ismail, 1960-, supervisor, Fakulti Kejuruteraan. Sekolah Kejuruteraan Elektrik
Format:
Language:eng
Published: Johor Bahru, Johor : Universiti Teknologi Malaysia, 2019
Subjects:
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author Muhammad Faidzal Mohamad Rasol, author
Razali Ismail, 1960-, supervisor
Fakulti Kejuruteraan. Sekolah Kejuruteraan Elektrik
author_facet Muhammad Faidzal Mohamad Rasol, author
Razali Ismail, 1960-, supervisor
Fakulti Kejuruteraan. Sekolah Kejuruteraan Elektrik
author_sort Muhammad Faidzal Mohamad Rasol, author
collection OCEAN
description
first_indexed 2024-03-05T16:13:24Z
format
id KOHA-OAI-TEST:554038
institution Universiti Teknologi Malaysia - OCEAN
language eng
last_indexed 2024-03-05T16:13:24Z
publishDate 2019
publisher Johor Bahru, Johor : Universiti Teknologi Malaysia,
record_format dspace
spelling KOHA-OAI-TEST:5540382020-12-19T17:20:56ZProcess parameter optimization of a 30nm junction-less nanowire transistor for low leakage current / Muhammad Faidzal Mohamad Rasol, author Razali Ismail, 1960-, supervisor Fakulti Kejuruteraan. Sekolah Kejuruteraan Elektrik Johor Bahru, Johor : Universiti Teknologi Malaysia,2019engIncludes bibliographical references : p. 47-50FEELECTLTransistorsStray currents
spellingShingle Transistors
Stray currents
Muhammad Faidzal Mohamad Rasol, author
Razali Ismail, 1960-, supervisor
Fakulti Kejuruteraan. Sekolah Kejuruteraan Elektrik
Process parameter optimization of a 30nm junction-less nanowire transistor for low leakage current /
title Process parameter optimization of a 30nm junction-less nanowire transistor for low leakage current /
title_full Process parameter optimization of a 30nm junction-less nanowire transistor for low leakage current /
title_fullStr Process parameter optimization of a 30nm junction-less nanowire transistor for low leakage current /
title_full_unstemmed Process parameter optimization of a 30nm junction-less nanowire transistor for low leakage current /
title_short Process parameter optimization of a 30nm junction-less nanowire transistor for low leakage current /
title_sort process parameter optimization of a 30nm junction less nanowire transistor for low leakage current
topic Transistors
Stray currents
work_keys_str_mv AT muhammadfaidzalmohamadrasolauthor processparameteroptimizationofa30nmjunctionlessnanowiretransistorforlowleakagecurrent
AT razaliismail1960supervisor processparameteroptimizationofa30nmjunctionlessnanowiretransistorforlowleakagecurrent
AT fakultikejuruteraansekolahkejuruteraanelektrik processparameteroptimizationofa30nmjunctionlessnanowiretransistorforlowleakagecurrent