Skip to content
VuFind
English
Deutsch
Español
Français
Italiano
日本語
Nederlands
Português
Português (Brasil)
中文(简体)
中文（繁體）
Türkçe
עברית
Gaeilge
Cymraeg
Ελληνικά
Català
Euskara
Русский
Čeština
Suomi
Svenska
polski
Dansk
slovenščina
اللغة العربية
বাংলা
Galego
Tiếng Việt
Hrvatski
हिंदी
Հայերէն
Українська
Sámegiella
Монгол
Language
All Fields
Title
Author
Subject
Call Number
ISBN/ISSN
Tag
Find
Advanced
VLSI architectures for dynamic...
Cite this
Text this
Email this
Print
Export Record
Export to RefWorks
Export to EndNoteWeb
Export to EndNote
Permanent link
VLSI architectures for dynamic time warping using systolic arrays /
12
Bibliographic Details
Main Authors:
318625 Jutand, F.
,
Demassieux, N.
,
Vicard, D.
,
Chollet, Gerard
Format:
Subjects:
Systolic array circuits
Holdings
Description
Similar Items
Staff View
Similar Items
Implementation of full systolic-array architecture on FPGA for image filtering application /
by: Tew, Yan Fen, 1991-, et al.
Published: (2015)
A systolic array for convolution /
by: 348222 Harun Ismail, et al.
Implementation of full systolic-array architecture on FPGA for image filtering application [electronic resource] /
by: Tew, Yan Fen, 1991-, et al.
Published: (2015)
A New Systolic Array Algorithm and Architecture for the VLSI Implementation of IDST Based on a Pseudo-Band Correlation Structure
by: CHIPER, D. F., et al.
Published: (2017-02-01)
A VLSI computing structure array processor /
by: Loh, Sun Meng, author, et al.
Published: (1993)