Optimization of Channel Length Nano-Scale Sinwt Based Sram Cell
This paper represents a channel length ratio optimization at a different high logic level voltage for 6-Silicon Nanowire Transistors (SiNWT) SRAM cell. This study is the first to demonstrate an optimized length ratio of nanowires with different Vdd of nano-scale SiNWT based SRAM cell. Noise margins...
Main Authors: | , , |
---|---|
Format: | Conference or Workshop Item |
Language: | English |
Published: |
EDP Sciences
2015
|
Subjects: | |
Online Access: | http://umpir.ump.edu.my/id/eprint/11734/1/ftech-2015-yasir-Optimization%20of%20Nanowires%20Ratio.pdf |