Robust and Latch-Up-Immune LVTSCR Device with an Embedded PMOSFET for ESD Protection in a 28-nm CMOS Process
Abstract Low-voltage-triggered silicon-controlled rectifier (LVTSCR) is expected to provide an electrostatic discharge (ESD) protection for a low-voltage integrated circuit. However, it is normally vulnerable to the latch-up effect due to its extremely low holding voltage. In this paper, a novel LVT...
Main Authors: | , , , , , , |
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Format: | Article |
Language: | English |
Published: |
SpringerOpen
2020-11-01
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Series: | Nanoscale Research Letters |
Subjects: | |
Online Access: | http://link.springer.com/article/10.1186/s11671-020-03437-3 |