A High-Speed Low-Cost Hardware Implementation for Depth Estimation Using Disparity Fusion Method

Depth estimation using stereo images can be achieved by calculating the disparity values between the left and the right images captured by two parallel cameras. Reconstructing depth information from 2D images is crucial in many applications, such as self-driving vehicles and robot navigation. Furthe...

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Main Authors: You-Rong Chen, Wei-Ting Chen, Shao-Chieh Liao, Pei-Yin Chen, Hong-Yu Fang, Tzu-You Tai
Format: Article
Language:English
Published: IEEE 2022-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/9817129/
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author You-Rong Chen
Wei-Ting Chen
Shao-Chieh Liao
Pei-Yin Chen
Hong-Yu Fang
Tzu-You Tai
author_facet You-Rong Chen
Wei-Ting Chen
Shao-Chieh Liao
Pei-Yin Chen
Hong-Yu Fang
Tzu-You Tai
author_sort You-Rong Chen
collection DOAJ
description Depth estimation using stereo images can be achieved by calculating the disparity values between the left and the right images captured by two parallel cameras. Reconstructing depth information from 2D images is crucial in many applications, such as self-driving vehicles and robot navigation. Furthermore, most of these applications are employed with resource-constrained devices and have real-time requirements. In this paper, a high-speed, low-cost hardware implementation for disparity estimation is proposed. We adopted the novel disparity fusion method in our architecture, which can significantly reduce the number of calculations in the overall process. A refinement method is also designed to reduce the error rate of the resulting depth map and improve the tolerance to light noise. The proposed algorithm was implemented with the Kintex-7 field-programmable gate array. Its performance was tested by using the Middlebury-Version 2 and -Version 3 datasets. The proposed algorithm provides an operating speed of 118 fps with an error rate of only 6.36%. Compared with other state-of-the-art designs used for similar applications, the proposed method can achieve a 34.6% reduction in the error rate while providing the highest speed with competitive hardware cost.
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spelling doaj.art-02b56fa5860e421392ecdf56ffc6224c2022-12-22T01:24:58ZengIEEEIEEE Access2169-35362022-01-0110728507286510.1109/ACCESS.2022.31890089817129A High-Speed Low-Cost Hardware Implementation for Depth Estimation Using Disparity Fusion MethodYou-Rong Chen0https://orcid.org/0000-0003-3935-7261Wei-Ting Chen1https://orcid.org/0000-0002-4785-6784Shao-Chieh Liao2Pei-Yin Chen3https://orcid.org/0000-0001-6561-3164Hong-Yu Fang4Tzu-You Tai5https://orcid.org/0000-0001-7365-7562Department of Computer Science and Information Engineering, Digital IC Design Laboratory, National Cheng Kung University, Tainan, TaiwanNovatek Microelectronics Corporation, Hsinchu, TaiwanDepartment of Computer Science and Information Engineering, Digital IC Design Laboratory, National Cheng Kung University, Tainan, TaiwanDepartment of Computer Science and Information Engineering, Digital IC Design Laboratory, National Cheng Kung University, Tainan, TaiwanNovatek Microelectronics Corporation, Hsinchu, TaiwanMediaTek Inc., Hsinchu, TaiwanDepth estimation using stereo images can be achieved by calculating the disparity values between the left and the right images captured by two parallel cameras. Reconstructing depth information from 2D images is crucial in many applications, such as self-driving vehicles and robot navigation. Furthermore, most of these applications are employed with resource-constrained devices and have real-time requirements. In this paper, a high-speed, low-cost hardware implementation for disparity estimation is proposed. We adopted the novel disparity fusion method in our architecture, which can significantly reduce the number of calculations in the overall process. A refinement method is also designed to reduce the error rate of the resulting depth map and improve the tolerance to light noise. The proposed algorithm was implemented with the Kintex-7 field-programmable gate array. Its performance was tested by using the Middlebury-Version 2 and -Version 3 datasets. The proposed algorithm provides an operating speed of 118 fps with an error rate of only 6.36%. Compared with other state-of-the-art designs used for similar applications, the proposed method can achieve a 34.6% reduction in the error rate while providing the highest speed with competitive hardware cost.https://ieeexplore.ieee.org/document/9817129/Depth estimationhardware implementationhigh-speedlow-coststereo matching
spellingShingle You-Rong Chen
Wei-Ting Chen
Shao-Chieh Liao
Pei-Yin Chen
Hong-Yu Fang
Tzu-You Tai
A High-Speed Low-Cost Hardware Implementation for Depth Estimation Using Disparity Fusion Method
IEEE Access
Depth estimation
hardware implementation
high-speed
low-cost
stereo matching
title A High-Speed Low-Cost Hardware Implementation for Depth Estimation Using Disparity Fusion Method
title_full A High-Speed Low-Cost Hardware Implementation for Depth Estimation Using Disparity Fusion Method
title_fullStr A High-Speed Low-Cost Hardware Implementation for Depth Estimation Using Disparity Fusion Method
title_full_unstemmed A High-Speed Low-Cost Hardware Implementation for Depth Estimation Using Disparity Fusion Method
title_short A High-Speed Low-Cost Hardware Implementation for Depth Estimation Using Disparity Fusion Method
title_sort high speed low cost hardware implementation for depth estimation using disparity fusion method
topic Depth estimation
hardware implementation
high-speed
low-cost
stereo matching
url https://ieeexplore.ieee.org/document/9817129/
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