CMOS backend-of-line compatible memory array and logic circuitries enabled by high performance atomic layer deposited ZnO thin-film transistor
Abstract The development of high-performance oxide-based transistors is critical to enable very large-scale integration (VLSI) of monolithic 3-D integrated circuit (IC) in complementary metal oxide semiconductor (CMOS) backend-of-line (BEOL). Atomic layer deposition (ALD) deposited ZnO is an attract...
| Main Authors: | , , , , , , , , , , , , |
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| Format: | Article |
| Language: | English |
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Nature Portfolio
2023-09-01
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| Series: | Nature Communications |
| Online Access: | https://doi.org/10.1038/s41467-023-41868-5 |
| _version_ | 1797558279321157632 |
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| author | Wenhui Wang Ke Li Jun Lan Mei Shen Zhongrui Wang Xuewei Feng Hongyu Yu Kai Chen Jiamin Li Feichi Zhou Longyang Lin Panpan Zhang Yida Li |
| author_facet | Wenhui Wang Ke Li Jun Lan Mei Shen Zhongrui Wang Xuewei Feng Hongyu Yu Kai Chen Jiamin Li Feichi Zhou Longyang Lin Panpan Zhang Yida Li |
| author_sort | Wenhui Wang |
| collection | DOAJ |
| description | Abstract The development of high-performance oxide-based transistors is critical to enable very large-scale integration (VLSI) of monolithic 3-D integrated circuit (IC) in complementary metal oxide semiconductor (CMOS) backend-of-line (BEOL). Atomic layer deposition (ALD) deposited ZnO is an attractive candidate due to its excellent electrical properties, low processing temperature below copper interconnect thermal budget, and conformal sidewall deposition for novel 3D architecture. An optimized ALD deposited ZnO thin-film transistor achieving a record field-effect and intrinsic mobility (µ FE /µ o ) of 85/140 cm2/V·s is presented here. The ZnO TFT was integrated with HfO2 RRAM in a 1 kbit (32 × 32) 1T1R array, demonstrating functionalities in RRAM switching. In order to co-design for future technology requiring high performance BEOL circuitries implementation, a spice-compatible model of the ZnO TFTs was developed. We then present designs of various ZnO TFT-based inverters, and 5-stage ring oscillators through simulations and experiments with working frequency exceeding 10’s of MHz. |
| first_indexed | 2024-03-10T17:28:01Z |
| format | Article |
| id | doaj.art-054db449a3d24cb4890317b069cfc85b |
| institution | Directory Open Access Journal |
| issn | 2041-1723 |
| language | English |
| last_indexed | 2024-03-10T17:28:01Z |
| publishDate | 2023-09-01 |
| publisher | Nature Portfolio |
| record_format | Article |
| series | Nature Communications |
| spelling | doaj.art-054db449a3d24cb4890317b069cfc85b2023-11-20T10:05:41ZengNature PortfolioNature Communications2041-17232023-09-0114111110.1038/s41467-023-41868-5CMOS backend-of-line compatible memory array and logic circuitries enabled by high performance atomic layer deposited ZnO thin-film transistorWenhui Wang0Ke Li1Jun Lan2Mei Shen3Zhongrui Wang4Xuewei Feng5Hongyu Yu6Kai Chen7Jiamin Li8Feichi Zhou9Longyang Lin10Panpan Zhang11Yida Li12School of Microelectronics, Southern University of Science and TechnologySchool of Microelectronics, Southern University of Science and TechnologySchool of Microelectronics, Southern University of Science and TechnologySchool of Microelectronics, Southern University of Science and TechnologyDepartment of Electrical and Electronic Engineering, The University of Hong KongShanghai Jiao Tong UniversitySchool of Microelectronics, Southern University of Science and TechnologySchool of Microelectronics, Southern University of Science and TechnologySchool of Microelectronics, Southern University of Science and TechnologySchool of Microelectronics, Southern University of Science and TechnologySchool of Microelectronics, Southern University of Science and TechnologyState Key Laboratory of Information Photonics and Optical Communications, Beijing University of Posts and TelecommunicationsSchool of Microelectronics, Southern University of Science and TechnologyAbstract The development of high-performance oxide-based transistors is critical to enable very large-scale integration (VLSI) of monolithic 3-D integrated circuit (IC) in complementary metal oxide semiconductor (CMOS) backend-of-line (BEOL). Atomic layer deposition (ALD) deposited ZnO is an attractive candidate due to its excellent electrical properties, low processing temperature below copper interconnect thermal budget, and conformal sidewall deposition for novel 3D architecture. An optimized ALD deposited ZnO thin-film transistor achieving a record field-effect and intrinsic mobility (µ FE /µ o ) of 85/140 cm2/V·s is presented here. The ZnO TFT was integrated with HfO2 RRAM in a 1 kbit (32 × 32) 1T1R array, demonstrating functionalities in RRAM switching. In order to co-design for future technology requiring high performance BEOL circuitries implementation, a spice-compatible model of the ZnO TFTs was developed. We then present designs of various ZnO TFT-based inverters, and 5-stage ring oscillators through simulations and experiments with working frequency exceeding 10’s of MHz.https://doi.org/10.1038/s41467-023-41868-5 |
| spellingShingle | Wenhui Wang Ke Li Jun Lan Mei Shen Zhongrui Wang Xuewei Feng Hongyu Yu Kai Chen Jiamin Li Feichi Zhou Longyang Lin Panpan Zhang Yida Li CMOS backend-of-line compatible memory array and logic circuitries enabled by high performance atomic layer deposited ZnO thin-film transistor Nature Communications |
| title | CMOS backend-of-line compatible memory array and logic circuitries enabled by high performance atomic layer deposited ZnO thin-film transistor |
| title_full | CMOS backend-of-line compatible memory array and logic circuitries enabled by high performance atomic layer deposited ZnO thin-film transistor |
| title_fullStr | CMOS backend-of-line compatible memory array and logic circuitries enabled by high performance atomic layer deposited ZnO thin-film transistor |
| title_full_unstemmed | CMOS backend-of-line compatible memory array and logic circuitries enabled by high performance atomic layer deposited ZnO thin-film transistor |
| title_short | CMOS backend-of-line compatible memory array and logic circuitries enabled by high performance atomic layer deposited ZnO thin-film transistor |
| title_sort | cmos backend of line compatible memory array and logic circuitries enabled by high performance atomic layer deposited zno thin film transistor |
| url | https://doi.org/10.1038/s41467-023-41868-5 |
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