Multi-Parameter Support with NTTs for NTRU and NTRU Prime on Cortex-M4
We propose NTT implementations with each supporting at least one parameter of NTRU and one parameter of NTRU Prime. Our implementations are based on size-1440, size-1536, and size-1728 convolutions without algebraic assumptions on the target polynomial rings. We also propose several improvements fo...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Ruhr-Universität Bochum
2022-08-01
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| Series: | Transactions on Cryptographic Hardware and Embedded Systems |
| Subjects: | |
| Online Access: | https://ojs-dev.ub.rub.de/index.php/TCHES/article/view/9823 |