Analysis of read speed latency in 6T-SRAM cell using multi-layered graphene nanoribbon and cu based nano-interconnects for high performance memory circuit design
In this study, we designed a 6T-SRAM cell using 16-nm CMOS process and analyzed the performance in terms of read-speed latency. The temperaturedependent Cu and multilayered graphene nanoribbon (MLGNR)-based nanointerconnect materials is used throughout the circuit (primarily bit/bit-bars [red lines]...
Main Authors: | , , , , , , , , |
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Format: | Article |
Language: | English |
Published: |
Electronics and Telecommunications Research Institute (ETRI)
2023-10-01
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Series: | ETRI Journal |
Subjects: | |
Online Access: | https://doi.org/10.4218/etrij.2022-0068 |