Extraction of Interconnect Parasitic Capacitance Matrix Based on Deep Neural Network

Extraction of Interconnect Parasitic Capacitance Matrix Based on Deep Neural Network

Interconnect parasitic capacitance extraction is crucial in analyzing VLSI circuits’ delay and crosstalk. This paper uses the deep neural network (DNN) to predict the parasitic capacitance matrix of a two-dimensional pattern. To save the DNN training time, the neural network’s output includes only c...

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Bibliographic Details
Main Authors: Yaoyao Ma, Xiaoyu Xu, Shuai Yan, Yaxing Zhou, Tianyu Zheng, Zhuoxiang Ren, Lan Chen
Format: Article
Language:English
Published: MDPI AG 2023-03-01
Series:Electronics
Subjects:
interconnect wire
parasitic capacitance matrix
data augmentation
DNN
ResNet
Online Access:https://www.mdpi.com/2079-9292/12/6/1440

Internet

https://www.mdpi.com/2079-9292/12/6/1440

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