A Low-Power Analog Integrated Implementation of the Support Vector Machine Algorithm with On-Chip Learning Tested on a Bearing Fault Application

A Low-Power Analog Integrated Implementation of the Support Vector Machine Algorithm with On-Chip Learning Tested on a Bearing Fault Application

A novel analog integrated implementation of a hardware-friendly support vector machine algorithm that can be a part of a classification system is presented in this work. The utilized architecture is capable of on-chip learning, making the overall circuit completely autonomous at the cost of power an...

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Bibliographic Details
Main Authors: Vassilis Alimisis, Georgios Gennis, Marios Gourdouparis, Christos Dimas, Paul P. Sotiriadis
Format: Article
Language:English
Published: MDPI AG 2023-04-01
Series:Sensors
Subjects:
support vector machine
bulk-controlled circuits
low-power design
bearing fault application
analog-hardware implementation
Online Access:https://www.mdpi.com/1424-8220/23/8/3978

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https://www.mdpi.com/1424-8220/23/8/3978

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