Performance optimization of high-K pocket hetero-dielectric TFET using improved geometry design
This study explores the optimization of a hetero-dielectric tunnel field-effect transistor (HDTFET) structure to improve device performance. By incorporating a high-k oxide pocket in a portion of the source-side gate insulator, a local minimum in the conduction band edge is induced at the source-cha...
Main Authors: | , , , , |
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Format: | Article |
Language: | English |
Published: |
Elsevier
2024-03-01
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Series: | Alexandria Engineering Journal |
Subjects: | |
Online Access: | http://www.sciencedirect.com/science/article/pii/S1110016824001169 |