Engineering MoSe2/MoS2 heterojunction traps in 2D transistors for multilevel memory, multiscale display, and synaptic functions

Engineering MoSe2/MoS2 heterojunction traps in 2D transistors for multilevel memory, multiscale display, and synaptic functions

Abstract We study a low voltage short pulse operating multilevel memory based on van der Waals heterostack (HS) n-MoSe2/n-MoS2 channel field-effect transistors (FETs). Our HS memory FET exploited the gate voltage (VGS)-induced trapping/de-trapping phenomena for Program/Erase functioning, which was m...

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Bibliographic Details
Main Authors: Yeonsu Jeong, Han Joo Lee, Junkyu Park, Sol Lee, Hye-Jin Jin, Sam Park, Hyunmin Cho, Sungjae Hong, Taewook Kim, Kwanpyo Kim, Shinhyun Choi, Seongil Im
Format: Article
Language:English
Published: Nature Portfolio 2022-03-01
Series:npj 2D Materials and Applications
Online Access:https://doi.org/10.1038/s41699-022-00295-8

Internet

https://doi.org/10.1038/s41699-022-00295-8

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