NS-GAAFET Compact Modeling: Technological Challenges in Sub-3-nm Circuit Performance

NS-GAAFET Compact Modeling: Technological Challenges in Sub-3-nm Circuit Performance

NanoSheet-Gate-All-Around-FETs (NS-GAAFETs) are commonly recognized as the future technology to push the digital node scaling into the sub-3 nm range. NS-GAAFETs are expected to replace FinFETs in a few years, as they provide highly electrostatic gate control thanks to the GAA structure, with four s...

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Bibliographic Details
Main Authors: Fabrizio Mo, Chiara Elfi Spano, Yuri Ardesi, Massimo Ruo Roch, Gianluca Piccinini, Marco Vacca
Format: Article
Language:English
Published: MDPI AG 2023-03-01
Series:Electronics
Subjects:
NS-GAAFET
compact modeling
digital circuits
low-K dielectrics
photolithography
process variations
Online Access:https://www.mdpi.com/2079-9292/12/6/1487

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https://www.mdpi.com/2079-9292/12/6/1487

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