| Summary: | Ultra Large Scale Integration (ULSI) are usually realized by a reduction of the size and high integration of semiconductor devices. In recent years, representative length scale of ULSI cells is going to be at a nanometre order. Several atomic level problems like a generation of lattice defects are taking place in the fabrication processes when the semiconductor device size becomes small. Dislocations often appear near hetero-interfaces and accumulate in the electron channel of semiconductor device is one of the most serious problems. Therefore, the evaluation and control of dislocation accumulation are crucially important for the design and development of semiconductor device structure. Generation and accumulation of dislocations are known to take place during the formation of thermal oxide film, and the cooling processes of semiconductor device fabrication. In this study, we simulate the dislocation accumulation during the formation of thermal oxide film of device fabrication process. Accumulation of dislocation is analysed by employing a technique of crystal plasticity analysis and evaluate the stress distribution, dislocation density distribution in the silicon substrate and structure of dislocation accumulation. Relations between the geometry of the shallow trench isolation type ULSI cells and dislocation accumulation are discussed.
|
|---|