A New Methodology to Manage FPGA Distributed Memory Content via Bitstream for Xilinx ZYNQ Devices

This paper proposes a methodology to access data and manage the content of distributed memories in FPGA designs through the configuration bitstream. Thanks to the methods proposed, it is possible to read and write the data content of registers without using the in/out ports of registers in a straigh...

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Bibliographic Details
Main Authors: Julen Gomez-Cornejo, Itxaso Aranzabal, Iraide López Ropero, Angel Javier Mazón, Aitzol Zuloaga
Format: Article
Language:English
Published: MDPI AG 2022-12-01
Series:Electronics
Subjects:
Online Access:https://www.mdpi.com/2079-9292/12/1/102