Compact Analog Chaotic Map Designs Using SOI Four-Gate Transistors

Compact Analog Chaotic Map Designs Using SOI Four-Gate Transistors

This work introduces three novel chaotic map circuits. Two of the map circuits use two <inline-formula> <tex-math notation="LaTeX">$p$ </tex-math></inline-formula>-channel and one <inline-formula> <tex-math notation="LaTeX">$n$ </tex-math>...

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Detalhes bibliográficos
Principais autores: Maisha Sadia, Partha Sarathi Paul, Md. Sakib Hasan
Formato: Artigo
Idioma:English
Publicado em: IEEE 2023-01-01
coleção:IEEE Access
Assuntos:
Chaos
chaotic oscillator
discrete chaotic map
G4FET
hardware security
nonlinear dynamics
Acesso em linha:https://ieeexplore.ieee.org/document/10167651/

Internet

https://ieeexplore.ieee.org/document/10167651/

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