HARDWARE IMPLEMENTATION OF PIPELINE BASED ROUTER DESIGN FOR ON-CHIP NETWORK

As the feature size is continuously decreasing and integration density is increasing, interconnections have become a dominating factor in determining the overall quality of a chip. Due to the limited scalability of system bus, it cannot meet the requirement of current System-on-Chip (SoC) implementa...

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Bibliografiske detaljer
Main Authors: U. Saravanakumar, R. Rangarajan, K. Rajasekar
Format: Article
Sprog:English
Udgivet: ICT Academy of Tamil Nadu 2012-12-01
Serier:ICTACT Journal on Communication Technology
Fag:
Online adgang:http://ictactjournals.in/paper/IJCT(Dec2012)_Vol3_Iss4_Paper_6_646to650.pdf