An energy and area efficient, all digital entropy source compatible with modern standards based on jitter pipelining
This paper proposes an energy and area efficient entropy source, suitable for true random number generation, accompanied with a stochastic model in a 28nm CMOS technology. The design uses a jitter pipelining architecture together with an increased timing resolution to achieve a maximal throughput o...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Ruhr-Universität Bochum
2022-08-01
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| Series: | Transactions on Cryptographic Hardware and Embedded Systems |
| Subjects: | |
| Online Access: | https://tches.iacr.org/index.php/TCHES/article/view/9814 |