A 12-Bit 2 GS/s Single-Channel High Linearity Pipelined ADC in 40 nm CMOS
This paper presents a single-channel 12-bit, 2 GS/s pipelined analog-to-digital converter (ADC) for wideband sampling receivers. The design adopts a novel source follower input buffer with multiple feedback loops to improve sample linearity and extend bandwidth. Additionally, an improved two stages...
Main Authors: | , , , , , , , |
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Format: | Article |
Language: | English |
Published: |
MDPI AG
2023-06-01
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Series: | Micromachines |
Subjects: | |
Online Access: | https://www.mdpi.com/2072-666X/14/7/1291 |