Four-Period Vertically Stacked SiGe/Si Channel FinFET Fabrication and Its Electrical Characteristics

Four-Period Vertically Stacked SiGe/Si Channel FinFET Fabrication and Its Electrical Characteristics

In this paper, to solve the epitaxial thickness limit and the high interface trap density of SiGe channel Fin field effect transistor (FinFET), a four-period vertically stacked SiGe/Si channel FinFET is presented. A high crystal quality of four-period stacked SiGe/Si multilayer epitaxial grown with...

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Bibliographic Details
Main Authors: Yongliang Li, Fei Zhao, Xiaohong Cheng, Haoyan Liu, Ying Zan, Junjie Li, Qingzhu Zhang, Zhenhua Wu, Jun Luo, Wenwu Wang
Format: Article
Language:English
Published: MDPI AG 2021-06-01
Series:Nanomaterials
Subjects:
stacked SiGe/Si
epitaxial grown
Fin etching
FinFET
Online Access:https://www.mdpi.com/2079-4991/11/7/1689

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https://www.mdpi.com/2079-4991/11/7/1689

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