N-Type Nanosheet FETs without Ground Plane Region for Process Simplification

This paper proposes a simplified fabrication processing for nanosheet Field-Effect Transistors (FETs) part of beyond-3-nm node technology. Formation of the ground plane (GP) region can be replaced by an epitaxial grown doped ultra-thin (DUT) layer on the starting wafer prior to Si<sub>x</su...

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Bibliographic Details
Main Authors: Khwang-Sun Lee, Jun-Young Park
Format: Article
Language:English
Published: MDPI AG 2022-03-01
Series:Micromachines
Subjects:
Online Access:https://www.mdpi.com/2072-666X/13/3/432