Performance Evaluation at the System Level of Reconfigurable Space-Time Coding Techniques for HSDPA

Performance Evaluation at the System Level of Reconfigurable Space-Time Coding Techniques for HSDPA

<p/> <p>A reconfigurable space-time coding technique is investigated, for a high-speed downlink packet access multiple-antenna network, which combats the effects of antenna correlation. Reconfigurability is achieved at the link level by introducing a linear precoder in a space-time block...

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Bibliographic Details
Main Authors: Alexiou Angeliki, Lazarakis Fotis, Peppas Kostas, Al-Gizawi Tareq, Axiotis Dimitrios I
Format: Article
Language:English
Published: SpringerOpen 2005-01-01
Series:EURASIP Journal on Advances in Signal Processing
Subjects:
space-time block coding
linear precoding
reconfigurability
system-level performance
link-to-system level interface
high-speed downlink packet access
Online Access:http://dx.doi.org/10.1155/ASP.2005.1656

Internet

http://dx.doi.org/10.1155/ASP.2005.1656

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