Performance Evaluation at the System Level of Reconfigurable Space-Time Coding Techniques for HSDPA

<p/> <p>A reconfigurable space-time coding technique is investigated, for a high-speed downlink packet access multiple-antenna network, which combats the effects of antenna correlation. Reconfigurability is achieved at the link level by introducing a linear precoder in a space-time block...

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Main Authors: Alexiou Angeliki, Lazarakis Fotis, Peppas Kostas, Al-Gizawi Tareq, Axiotis Dimitrios I
Format: Article
Language:English
Published: SpringerOpen 2005-01-01
Series:EURASIP Journal on Advances in Signal Processing
Subjects:
Online Access:http://dx.doi.org/10.1155/ASP.2005.1656
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author Alexiou Angeliki
Lazarakis Fotis
Peppas Kostas
Al-Gizawi Tareq
Axiotis Dimitrios I
author_facet Alexiou Angeliki
Lazarakis Fotis
Peppas Kostas
Al-Gizawi Tareq
Axiotis Dimitrios I
author_sort Alexiou Angeliki
collection DOAJ
description <p/> <p>A reconfigurable space-time coding technique is investigated, for a high-speed downlink packet access multiple-antenna network, which combats the effects of antenna correlation. Reconfigurability is achieved at the link level by introducing a linear precoder in a space-time block coded system. The technique assumes knowledge of the long-term characteristics of the channel, namely the channel correlation matrix at the transmitter. The benefits of the proposed reconfigurable technique as compared to the conventional non-reconfigurable versions are evaluated via system-level simulations. In order to characterize the system-level performance accurately and, at the same time, use a feasible approach in terms of computational complexity, a suitable link-to-system interface has been developed. The average system throughput and the number of satisfied users are the performance metrics of interest. Simulation results demonstrate the performance enhancements achieved by the application of reconfigurable techniques as compared to their conventional counterparts.</p>
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spelling doaj.art-15cac443a9b247718b0da629122786af2022-12-21T18:55:59ZengSpringerOpenEURASIP Journal on Advances in Signal Processing1687-61721687-61802005-01-01200511170786Performance Evaluation at the System Level of Reconfigurable Space-Time Coding Techniques for HSDPAAlexiou AngelikiLazarakis FotisPeppas KostasAl-Gizawi TareqAxiotis Dimitrios I<p/> <p>A reconfigurable space-time coding technique is investigated, for a high-speed downlink packet access multiple-antenna network, which combats the effects of antenna correlation. Reconfigurability is achieved at the link level by introducing a linear precoder in a space-time block coded system. The technique assumes knowledge of the long-term characteristics of the channel, namely the channel correlation matrix at the transmitter. The benefits of the proposed reconfigurable technique as compared to the conventional non-reconfigurable versions are evaluated via system-level simulations. In order to characterize the system-level performance accurately and, at the same time, use a feasible approach in terms of computational complexity, a suitable link-to-system interface has been developed. The average system throughput and the number of satisfied users are the performance metrics of interest. Simulation results demonstrate the performance enhancements achieved by the application of reconfigurable techniques as compared to their conventional counterparts.</p>http://dx.doi.org/10.1155/ASP.2005.1656space-time block codinglinear precodingreconfigurabilitysystem-level performancelink-to-system level interfacehigh-speed downlink packet access
spellingShingle Alexiou Angeliki
Lazarakis Fotis
Peppas Kostas
Al-Gizawi Tareq
Axiotis Dimitrios I
Performance Evaluation at the System Level of Reconfigurable Space-Time Coding Techniques for HSDPA
EURASIP Journal on Advances in Signal Processing
space-time block coding
linear precoding
reconfigurability
system-level performance
link-to-system level interface
high-speed downlink packet access
title Performance Evaluation at the System Level of Reconfigurable Space-Time Coding Techniques for HSDPA
title_full Performance Evaluation at the System Level of Reconfigurable Space-Time Coding Techniques for HSDPA
title_fullStr Performance Evaluation at the System Level of Reconfigurable Space-Time Coding Techniques for HSDPA
title_full_unstemmed Performance Evaluation at the System Level of Reconfigurable Space-Time Coding Techniques for HSDPA
title_short Performance Evaluation at the System Level of Reconfigurable Space-Time Coding Techniques for HSDPA
title_sort performance evaluation at the system level of reconfigurable space time coding techniques for hsdpa
topic space-time block coding
linear precoding
reconfigurability
system-level performance
link-to-system level interface
high-speed downlink packet access
url http://dx.doi.org/10.1155/ASP.2005.1656
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