MRONoC: A Low Latency and Energy Efficient on Chip Optical Interconnect Architecture

MRONoC: A Low Latency and Energy Efficient on Chip Optical Interconnect Architecture

The circuit switched optical network on chip (ONoC) is popularly employed since the optical buffer is not available. However, this technique suffers from limited transmission bandwidth, high setup-time overhead, and high network resource contention, which consequentially induces long latency and deg...

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Bibliographic Details
Main Authors: Huaxi Gu, Ke Chen, Yintang Yang, Zheng Chen, Bowen Zhang
Format: Article
Language:English
Published: IEEE 2017-01-01
Series:IEEE Photonics Journal
Subjects:
Silicon nanophotonics
network on chip
optical interconnect
wavelength assignment
wavelength division multiplexing (WDM).
Online Access:https://ieeexplore.ieee.org/document/7814144/

Internet

https://ieeexplore.ieee.org/document/7814144/

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