Temperature Estimation of HBM2 Channels with Tail Distribution of Retention Errors in FPGA-HBM2 Platform
High-bandwidth memory 2 (HBM2) vertically stacks multiple dynamic random-access memory (DRAM) dies to achieve a small form factor and high capacity. However, it is difficult to diagnose HBM2 issues owing to their structural complexity and 2.5D integration with heterogeneous chips. The effects of the...
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MDPI AG
2022-12-01
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| Series: | Electronics |
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| Online Access: | https://www.mdpi.com/2079-9292/12/1/32 |
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| author | Junhyeong Kwon Shi-Jie Wen Rita Fung Sanghyeon Baeg |
| author_facet | Junhyeong Kwon Shi-Jie Wen Rita Fung Sanghyeon Baeg |
| author_sort | Junhyeong Kwon |
| collection | DOAJ |
| description | High-bandwidth memory 2 (HBM2) vertically stacks multiple dynamic random-access memory (DRAM) dies to achieve a small form factor and high capacity. However, it is difficult to diagnose HBM2 issues owing to their structural complexity and 2.5D integration with heterogeneous chips. The effects of the temperature at the base logic die (T<sub>L</sub>), and the refresh interval at the stacked DRAM dies, were experimentally investigated by counting the dynamic retention errors in the eight channels in an HBM2. T<sub>L</sub> was indirectly controlled by the heatsink temperature (T<sub>S</sub>). The lognormal distribution represents the distribution of the cell counts with varying refresh times. All Z-magnitudes (multiples of the distribution standard deviation) over the various refresh cycle times (RCTs) up to 2.045 s in a single channel at T<sub>L</sub> of 70 °C appeared below 4.4, which means that the error bits belong to the tail distribution. The Z-differences in the eight channels were distinctively larger than the Z-differences of the same channels at a constant temperature, demonstrating that the temperature difference in the stacked dies resulted in larger Z-differences. The largest Z-difference was 0.091 for all the channels at an RCT of 1.406 s, which was approximately 4.82 times smaller than the Z-difference between the T<sub>L</sub> temperatures of 70 °C and 80 °C in a single channel. The Z-difference between the T<sub>L</sub> temperatures of 70 °C and 72 °C in a single channel was approximately the same as the Z-difference in all the channels at an RCT of 2.045 s. |
| first_indexed | 2024-03-11T10:04:38Z |
| format | Article |
| id | doaj.art-1957f1152e3d48cda5c126aa0dc33244 |
| institution | Directory Open Access Journal |
| issn | 2079-9292 |
| language | English |
| last_indexed | 2024-03-11T10:04:38Z |
| publishDate | 2022-12-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Electronics |
| spelling | doaj.art-1957f1152e3d48cda5c126aa0dc332442023-11-16T15:10:11ZengMDPI AGElectronics2079-92922022-12-011213210.3390/electronics12010032Temperature Estimation of HBM2 Channels with Tail Distribution of Retention Errors in FPGA-HBM2 PlatformJunhyeong Kwon0Shi-Jie Wen1Rita Fung2Sanghyeon Baeg3Department of Electronics and Communication Engineering, Hanyang University, Ansan 15588, Republic of KoreaCisco Systems Inc., San Jose, CA 95134, USACisco Systems Inc., San Jose, CA 95134, USADepartment of Electronics and Communication Engineering, Hanyang University, Ansan 15588, Republic of KoreaHigh-bandwidth memory 2 (HBM2) vertically stacks multiple dynamic random-access memory (DRAM) dies to achieve a small form factor and high capacity. However, it is difficult to diagnose HBM2 issues owing to their structural complexity and 2.5D integration with heterogeneous chips. The effects of the temperature at the base logic die (T<sub>L</sub>), and the refresh interval at the stacked DRAM dies, were experimentally investigated by counting the dynamic retention errors in the eight channels in an HBM2. T<sub>L</sub> was indirectly controlled by the heatsink temperature (T<sub>S</sub>). The lognormal distribution represents the distribution of the cell counts with varying refresh times. All Z-magnitudes (multiples of the distribution standard deviation) over the various refresh cycle times (RCTs) up to 2.045 s in a single channel at T<sub>L</sub> of 70 °C appeared below 4.4, which means that the error bits belong to the tail distribution. The Z-differences in the eight channels were distinctively larger than the Z-differences of the same channels at a constant temperature, demonstrating that the temperature difference in the stacked dies resulted in larger Z-differences. The largest Z-difference was 0.091 for all the channels at an RCT of 1.406 s, which was approximately 4.82 times smaller than the Z-difference between the T<sub>L</sub> temperatures of 70 °C and 80 °C in a single channel. The Z-difference between the T<sub>L</sub> temperatures of 70 °C and 72 °C in a single channel was approximately the same as the Z-difference in all the channels at an RCT of 2.045 s.https://www.mdpi.com/2079-9292/12/1/32HBM2FPGADRAM3D ICretention error |
| spellingShingle | Junhyeong Kwon Shi-Jie Wen Rita Fung Sanghyeon Baeg Temperature Estimation of HBM2 Channels with Tail Distribution of Retention Errors in FPGA-HBM2 Platform Electronics HBM2 FPGA DRAM 3D IC retention error |
| title | Temperature Estimation of HBM2 Channels with Tail Distribution of Retention Errors in FPGA-HBM2 Platform |
| title_full | Temperature Estimation of HBM2 Channels with Tail Distribution of Retention Errors in FPGA-HBM2 Platform |
| title_fullStr | Temperature Estimation of HBM2 Channels with Tail Distribution of Retention Errors in FPGA-HBM2 Platform |
| title_full_unstemmed | Temperature Estimation of HBM2 Channels with Tail Distribution of Retention Errors in FPGA-HBM2 Platform |
| title_short | Temperature Estimation of HBM2 Channels with Tail Distribution of Retention Errors in FPGA-HBM2 Platform |
| title_sort | temperature estimation of hbm2 channels with tail distribution of retention errors in fpga hbm2 platform |
| topic | HBM2 FPGA DRAM 3D IC retention error |
| url | https://www.mdpi.com/2079-9292/12/1/32 |
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