Monolithic 3D integration of back-end compatible 2D material FET on Si FinFET
Abstract The performance enhancement of integrated circuits relying on dimension scaling (i.e., following Moore’s Law) is more and more challenging owing to the physical limit of Si materials. Monolithic three-dimensional (M3D) integration has been considered as a powerful scheme to further boost up...
| Main Authors: | , , , , , , , , , , , |
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| Format: | Article |
| Language: | English |
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Nature Portfolio
2023-02-01
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| Series: | npj 2D Materials and Applications |
| Online Access: | https://doi.org/10.1038/s41699-023-00371-7 |
| _version_ | 1811165820538060800 |
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| author | Shi-Xian Guan Tilo H. Yang Chih-Hao Yang Chuan-Jie Hong Bor-Wei Liang Kristan Bryan Simbulan Jyun-Hong Chen Chun-Jung Su Kai-Shin Li Yuan-Liang Zhong Lain-Jong Li Yann-Wen Lan |
| author_facet | Shi-Xian Guan Tilo H. Yang Chih-Hao Yang Chuan-Jie Hong Bor-Wei Liang Kristan Bryan Simbulan Jyun-Hong Chen Chun-Jung Su Kai-Shin Li Yuan-Liang Zhong Lain-Jong Li Yann-Wen Lan |
| author_sort | Shi-Xian Guan |
| collection | DOAJ |
| description | Abstract The performance enhancement of integrated circuits relying on dimension scaling (i.e., following Moore’s Law) is more and more challenging owing to the physical limit of Si materials. Monolithic three-dimensional (M3D) integration has been considered as a powerful scheme to further boost up the system performance. Two-dimensional (2D) materials such as MoS2 are potential building blocks for constructing upper-tier transistors owing to their high mobility, atomic thickness, and back-end-of-line (BEOL) compatible processes. The concept to integrate 2D material-based devices with Si field-effect transistor (FET) is technologically important but the compatibility is yet to be experimentally demonstrated. Here, we successfully integrated an n-type monolayer MoS2 FET on a p-type Si fin-shaped FET with 20 nm fin width via an M3D integration technique to form a complementary inverter. The integration was enabled by deliberately adopting industrially matured techniques, such as chemical mechanical planarization and e-beam evaporation, to ensure its compatibility with the existing 3D integrated circuit process and the semiconductor industry in general. The 2D FET is fabricated using low-temperature sequential processes to avoid the degradation of lower-tier Si devices. The MoS2 n-FETs and Si p-FinFETs display symmetrical transfer characteristics and the resulting 3D complementary metal-oxide-semiconductor inverter show a voltage transfer characteristic with a maximum gain of ~38. This work clearly proves the integration compatibility of 2D materials with Si-based devices, encouraging the further development of monolithic 3D integrated circuits. |
| first_indexed | 2024-04-10T15:43:54Z |
| format | Article |
| id | doaj.art-21909ef3fb1d41169b9cade8d1307404 |
| institution | Directory Open Access Journal |
| issn | 2397-7132 |
| language | English |
| last_indexed | 2024-04-10T15:43:54Z |
| publishDate | 2023-02-01 |
| publisher | Nature Portfolio |
| record_format | Article |
| series | npj 2D Materials and Applications |
| spelling | doaj.art-21909ef3fb1d41169b9cade8d13074042023-02-12T12:13:45ZengNature Portfolionpj 2D Materials and Applications2397-71322023-02-01711810.1038/s41699-023-00371-7Monolithic 3D integration of back-end compatible 2D material FET on Si FinFETShi-Xian Guan0Tilo H. Yang1Chih-Hao Yang2Chuan-Jie Hong3Bor-Wei Liang4Kristan Bryan Simbulan5Jyun-Hong Chen6Chun-Jung Su7Kai-Shin Li8Yuan-Liang Zhong9Lain-Jong Li10Yann-Wen Lan11Department of Physics and Quantum Information Center, Chung Yuan Christian UniversityDepartment of Physics, National Taiwan Normal UniversityDepartment of Physics and Quantum Information Center, Chung Yuan Christian UniversityDepartment of Physics and Quantum Information Center, Chung Yuan Christian UniversityGraduate Institute of Electronics Engineering, National Taiwan UniversityDepartment of Physics, National Taiwan Normal UniversityNational Applied Research Laboratories, National Taiwan Semiconductor Research InstituteNational Applied Research Laboratories, National Taiwan Semiconductor Research InstituteNational Applied Research Laboratories, National Taiwan Semiconductor Research InstituteDepartment of Physics and Quantum Information Center, Chung Yuan Christian UniversityDepartment of Mechanical Engineering, The University of Hong KongDepartment of Physics, National Taiwan Normal UniversityAbstract The performance enhancement of integrated circuits relying on dimension scaling (i.e., following Moore’s Law) is more and more challenging owing to the physical limit of Si materials. Monolithic three-dimensional (M3D) integration has been considered as a powerful scheme to further boost up the system performance. Two-dimensional (2D) materials such as MoS2 are potential building blocks for constructing upper-tier transistors owing to their high mobility, atomic thickness, and back-end-of-line (BEOL) compatible processes. The concept to integrate 2D material-based devices with Si field-effect transistor (FET) is technologically important but the compatibility is yet to be experimentally demonstrated. Here, we successfully integrated an n-type monolayer MoS2 FET on a p-type Si fin-shaped FET with 20 nm fin width via an M3D integration technique to form a complementary inverter. The integration was enabled by deliberately adopting industrially matured techniques, such as chemical mechanical planarization and e-beam evaporation, to ensure its compatibility with the existing 3D integrated circuit process and the semiconductor industry in general. The 2D FET is fabricated using low-temperature sequential processes to avoid the degradation of lower-tier Si devices. The MoS2 n-FETs and Si p-FinFETs display symmetrical transfer characteristics and the resulting 3D complementary metal-oxide-semiconductor inverter show a voltage transfer characteristic with a maximum gain of ~38. This work clearly proves the integration compatibility of 2D materials with Si-based devices, encouraging the further development of monolithic 3D integrated circuits.https://doi.org/10.1038/s41699-023-00371-7 |
| spellingShingle | Shi-Xian Guan Tilo H. Yang Chih-Hao Yang Chuan-Jie Hong Bor-Wei Liang Kristan Bryan Simbulan Jyun-Hong Chen Chun-Jung Su Kai-Shin Li Yuan-Liang Zhong Lain-Jong Li Yann-Wen Lan Monolithic 3D integration of back-end compatible 2D material FET on Si FinFET npj 2D Materials and Applications |
| title | Monolithic 3D integration of back-end compatible 2D material FET on Si FinFET |
| title_full | Monolithic 3D integration of back-end compatible 2D material FET on Si FinFET |
| title_fullStr | Monolithic 3D integration of back-end compatible 2D material FET on Si FinFET |
| title_full_unstemmed | Monolithic 3D integration of back-end compatible 2D material FET on Si FinFET |
| title_short | Monolithic 3D integration of back-end compatible 2D material FET on Si FinFET |
| title_sort | monolithic 3d integration of back end compatible 2d material fet on si finfet |
| url | https://doi.org/10.1038/s41699-023-00371-7 |
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