Single-Grain Gate-All-Around Si Nanowire FET Using Low-Thermal-Budget Processes for Monolithic Three-Dimensional Integrated Circuits

Single-Grain Gate-All-Around Si Nanowire FET Using Low-Thermal-Budget Processes for Monolithic Three-Dimensional Integrated Circuits

We introduce a single-grain gate-all-around (GAA) Si nanowire (NW) FET using the location-controlled-grain technique and several innovative low-thermal budget processes, including green nanosecond laser crystallization, far-infrared laser annealing, and hybrid laser-assisted salicidation, that keep...

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Bibliographic Details
Main Authors: Tung-Ying Hsieh, Ping-Yi Hsieh, Chih-Chao Yang, Chang-Hong Shen, Jia-Min Shieh, Wen-Kuan Yeh, Meng-Chyi Wu
Format: Article
Language:English
Published: MDPI AG 2020-07-01
Series:Micromachines
Subjects:
monolithic 3D
gate-all-around
nanowire FET
low-thermal budget
location-controlled-grain
laser crystallization
Online Access:https://www.mdpi.com/2072-666X/11/8/741

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https://www.mdpi.com/2072-666X/11/8/741

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