Test Program Generation for Microprocessors Based on Pipeline Hazards Templates
In this work, a method for the automated test programs generation aimed at the verification of microprocessor control logic is considered. The method is based on formal specification of a microprocessor instruction set and description of pipeline hazards templates. The use of formal specifications a...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Ivannikov Institute for System Programming of the Russian Academy of Sciences
2018-10-01
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| Series: | Труды Института системного программирования РАН |
| Subjects: | |
| Online Access: | https://ispranproceedings.elpub.ru/jour/article/view/1080 |