Design of canonical signed digit multiplier using spurious power suppression technique adder
Abstract Reducing power consumption is a major challenge in developing integrated processors for smart portable devices. This is particularly important for extending battery life and ensuring extended usage of the device. However, some DSP processing applications involve complex algorithms that cons...
Main Authors: | , , |
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Format: | Article |
Language: | English |
Published: |
SpringerOpen
2023-07-01
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Series: | Journal of Engineering and Applied Science |
Subjects: | |
Online Access: | https://doi.org/10.1186/s44147-023-00254-0 |