Design of 10T full adder cell for ultralow-power applications
This research paper performs symmetrical transient response analysis of FO4 inverter logic gate at 16-nm technology node. It is observed that symmetry is obtained at the aspect ratio (β) is equal to 3.52. With this β ratio, minimum energy point is investigated and found to be 0.15 V. At this minimum...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Elsevier
2018-12-01
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| Series: | Ain Shams Engineering Journal |
| Online Access: | http://www.sciencedirect.com/science/article/pii/S2090447917300734 |