Energy-Accuracy Trade-Offs for Resistive In-Memory Computing Architectures

Energy-Accuracy Trade-Offs for Resistive In-Memory Computing Architectures

Resistive in-memory computing (IMC) architectures currently lag behind SRAM IMCs and digital accelerators in both energy efficiency and compute density due to their low compute accuracy. This article proposes the use of signal-to-noise-plus-distortion ratio (SNDR) to quantify the compute accuracy of...

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Bibliographic Details
Main Authors: Saion K. Roy, Naresh R. Shanbhag
Format: Article
Language:English
Published: IEEE 2024-01-01
Series:IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Subjects:
Embedded nonvolatile memory (eNVM)
ferroelectric field effect transistor (FeFET)
in-memory computing (IMC)
magnetoresistive random access memory (MRAM)
parallel bar
resistive random access memory (ReRAM)
Online Access:https://ieeexplore.ieee.org/document/10478888/

Internet

https://ieeexplore.ieee.org/document/10478888/

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