FPGA Implementation of Nerve Cell Using Izhikevich Neuronal Model as Spike Generator (SG)

FPGA Implementation of Nerve Cell Using Izhikevich Neuronal Model as Spike Generator (SG)

The neuron is sometimes referred to as the “head” or “central” cell of the nervous system since it has the ability to communicate with other neurons or cells via electrical impulses. The hardware realization and simulation of these neurons are critical in...

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Bibliographic Details
Main Authors: Mohammed Tariqul Islam, Fawwaz Hazzazi, Ahasanul Hoque, Saeed Haghiri, Muhammad Akmal Chaudhary, Milad Ghanbarpour
Format: Article
Language:English
Published: IEEE 2024-01-01
Series:IEEE Access
Subjects:
Izhikevich
FPGA
digital FPGA realization
neuron
hardware implementation
low-cost
Online Access:https://ieeexplore.ieee.org/document/10359518/

Internet

https://ieeexplore.ieee.org/document/10359518/

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