Optimization of process parameter variations on leakage current in in silicon-oninsulator vertical double gate mosfet device

Optimization of process parameter variations on leakage current in in silicon-oninsulator vertical double gate mosfet device

This paper presents a study of optimizing input process parameters on leakage current (IOFF) in silicon-on-insulator (SOI) Vertical Double-Gate,Metal Oxide Field-Effect-Transistor (MOSFET) by using L36 Taguchi method. The performance of SOI Vertical DG-MOSFET device is evaluated in terms of its lowe...

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Bibliographic Details
Main Authors: K.E. Kaharudin, F. Salehuddin, A.S.M. Zain, M.N.I. Abd Aziz
Format: Article
Language:English
Published: Universiti Malaysia Pahang Publishing 2015-12-01
Series:Journal of Mechanical Engineering and Sciences
Subjects:
Analysis of variance
DG-MOSFET
SNR
SOI
Online Access:http://jmes.ump.edu.my/images/Volume_9/9_kaharudin%20et%20al.pdf

Internet

http://jmes.ump.edu.my/images/Volume_9/9_kaharudin%20et%20al.pdf

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