An N-Path Sub-GHz Ultra-Low Power Receiver Exploiting an N-Path Notch Filter Topology in 90 nm CMOS

An N-Path Sub-GHz Ultra-Low Power Receiver Exploiting an N-Path Notch Filter Topology in 90 nm CMOS

This paper describes an N-path sub-GHz ultra-low power receiver exploiting an N-path notch filter topology in 90nm CMOS process. The receiver achieves the flexibility in the operating frequency due to an adjustable internal impedance matching network with an N-path notch filter. The receiver consist...

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Bibliographic Details
Main Authors: Lei Lei, Xiao Li, Xiaoran Li, Zicheng Liu, Quanwen Qi, Xinghua Wang, Weijiang Wang
Format: Article
Language:English
Published: IEEE 2023-01-01
Series:IEEE Access
Subjects:
CMOS
N-path notch filter
passive mixer
receiver
ultra-low power
Online Access:https://ieeexplore.ieee.org/document/10070768/

Internet

https://ieeexplore.ieee.org/document/10070768/

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