Design a PLL for Fractional Frequency Synthesizers using DDSM with Reduced Hardware
Phase locked loop (PLL) circuits are widely used in fractional frequency synthesizers. In these synthesizers, fractional multiples of the reference frequency can be synthesized, so the reference frequency and the bandwidth of the loop can be increased. This frequency synthesizer is commonly used due...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
University of Sistan and Baluchestan
2022-06-01
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| Series: | International Journal of Industrial Electronics, Control and Optimization |
| Subjects: | |
| Online Access: | https://ieco.usb.ac.ir/article_6972_1d148aa208601ab48c4b1ab0d6f8c39a.pdf |