SAT-based Formal Verification of Fault Injection Countermeasures for Cryptographic Circuits
Fault injection attacks represent a type of active, physical attack against cryptographic circuits. Various countermeasures have been proposed to thwart such attacks, however, the design and implementation of which are intricate, error-prone, and laborious. The current formal fault-resistance verif...
Main Authors: | , , , , |
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Format: | Article |
Language: | English |
Published: |
Ruhr-Universität Bochum
2024-09-01
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Series: | Transactions on Cryptographic Hardware and Embedded Systems |
Subjects: | |
Online Access: | https://tches.iacr.org/index.php/TCHES/article/view/11782 |