Embeddable parallel digital image of doubly-fed induction generator

Embeddable parallel digital image of doubly-fed induction generator

Due to the complexity of the structure of doubly-fed induction generator (DFIG), it is difficult to conduct real-time simulation. For this reason, this paper designs an embeddable parallel digital image IP of DFIG based on field programmable logic array (FPGA) to realize efficient electromagnetic si...

Full description

Bibliographic Details
Main Authors: Zheng Yang, Hua Ye, Wei Pei, Chen Zheng, Yuzheng Tang, Yi Wang
Format: Article
Language:English
Published: Elsevier 2023-04-01
Series:Energy Reports
Subjects:
FPGA
Virtual capacitor equivalent method
Parallel computing
DFIG
Faster-than-real-time simulation
Online Access:http://www.sciencedirect.com/science/article/pii/S2352484723002627

Internet

http://www.sciencedirect.com/science/article/pii/S2352484723002627

Similar Items