Switchable‐Memory Operation of Silicon Nanowire Transistor
Abstract The switchable‐memory operation of a feedback silicon nanowire transistor with a dual‐gate structure is demonstrated. The single transistor exhibits volatile memory characteristics with a retention time longer than 3600 s, as well as a switching capability with a subthreshold swing lower th...
| Main Authors: | , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley-VCH
2018-12-01
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| Series: | Advanced Electronic Materials |
| Subjects: | |
| Online Access: | https://doi.org/10.1002/aelm.201800429 |
| _version_ | 1797663930101792768 |
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| author | Yoonjoong Kim Jinsun Cho Doohyeok Lim Sola Woo Kyoungah Cho Sangsig Kim |
| author_facet | Yoonjoong Kim Jinsun Cho Doohyeok Lim Sola Woo Kyoungah Cho Sangsig Kim |
| author_sort | Yoonjoong Kim |
| collection | DOAJ |
| description | Abstract The switchable‐memory operation of a feedback silicon nanowire transistor with a dual‐gate structure is demonstrated. The single transistor exhibits volatile memory characteristics with a retention time longer than 3600 s, as well as a switching capability with a subthreshold swing lower than 7 mV dec−1. A gate‐controlled memory window forms around a gate voltage of 0 V owing to the positive feedback loop in the channel region, allowing a program/erase endurance of more than 1000 cycles. The memory transistor, with switching capability, opens up the possibility of overcoming not only the scaling limit faced by conventional volatile memory but also the inherent drawback of the separation of the building blocks for memory and logic. |
| first_indexed | 2024-03-11T19:21:55Z |
| format | Article |
| id | doaj.art-38b0ce9a1edc46bcbf00de7cd60a337a |
| institution | Directory Open Access Journal |
| issn | 2199-160X |
| language | English |
| last_indexed | 2024-03-11T19:21:55Z |
| publishDate | 2018-12-01 |
| publisher | Wiley-VCH |
| record_format | Article |
| series | Advanced Electronic Materials |
| spelling | doaj.art-38b0ce9a1edc46bcbf00de7cd60a337a2023-10-07T03:29:12ZengWiley-VCHAdvanced Electronic Materials2199-160X2018-12-01412n/an/a10.1002/aelm.201800429Switchable‐Memory Operation of Silicon Nanowire TransistorYoonjoong Kim0Jinsun Cho1Doohyeok Lim2Sola Woo3Kyoungah Cho4Sangsig Kim5Department of Electrical Engineering Korea University 5‐1, Anam‐dong Seongbuk‐gu Seoul 02841 KoreaDepartment of Electrical Engineering Korea University 5‐1, Anam‐dong Seongbuk‐gu Seoul 02841 KoreaDepartment of Electrical Engineering Korea University 5‐1, Anam‐dong Seongbuk‐gu Seoul 02841 KoreaDepartment of Electrical Engineering Korea University 5‐1, Anam‐dong Seongbuk‐gu Seoul 02841 KoreaDepartment of Electrical Engineering Korea University 5‐1, Anam‐dong Seongbuk‐gu Seoul 02841 KoreaDepartment of Electrical Engineering Korea University 5‐1, Anam‐dong Seongbuk‐gu Seoul 02841 KoreaAbstract The switchable‐memory operation of a feedback silicon nanowire transistor with a dual‐gate structure is demonstrated. The single transistor exhibits volatile memory characteristics with a retention time longer than 3600 s, as well as a switching capability with a subthreshold swing lower than 7 mV dec−1. A gate‐controlled memory window forms around a gate voltage of 0 V owing to the positive feedback loop in the channel region, allowing a program/erase endurance of more than 1000 cycles. The memory transistor, with switching capability, opens up the possibility of overcoming not only the scaling limit faced by conventional volatile memory but also the inherent drawback of the separation of the building blocks for memory and logic.https://doi.org/10.1002/aelm.201800429one transistorpositive feedback loopsilicon nanowiresswitchable‐memory |
| spellingShingle | Yoonjoong Kim Jinsun Cho Doohyeok Lim Sola Woo Kyoungah Cho Sangsig Kim Switchable‐Memory Operation of Silicon Nanowire Transistor Advanced Electronic Materials one transistor positive feedback loop silicon nanowires switchable‐memory |
| title | Switchable‐Memory Operation of Silicon Nanowire Transistor |
| title_full | Switchable‐Memory Operation of Silicon Nanowire Transistor |
| title_fullStr | Switchable‐Memory Operation of Silicon Nanowire Transistor |
| title_full_unstemmed | Switchable‐Memory Operation of Silicon Nanowire Transistor |
| title_short | Switchable‐Memory Operation of Silicon Nanowire Transistor |
| title_sort | switchable memory operation of silicon nanowire transistor |
| topic | one transistor positive feedback loop silicon nanowires switchable‐memory |
| url | https://doi.org/10.1002/aelm.201800429 |
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