A new BIST scheme for low-power and high-resolution DAC testing
A BIST scheme for testing on chip DAC is presented in this paper. We discuss the generation of on chip testing stimuli and the measurement of digital signals with a narrow-band digital filter. We validate the scheme with software simulation and point out the possibility of ADC BIST with verified DAC...
| Main Authors: | , , , , |
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| Format: | Article |
| Language: | deu |
| Published: |
Copernicus Publications
2003-01-01
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| Series: | Advances in Radio Science |
| Online Access: | http://www.adv-radio-sci.net/1/289/2003/ars-1-289-2003.pdf |