Verification of a Fabless Device Model Using TCAD Tools: from Bipolar Transistor Formation to I-V Characteristics Extraction

Verification of a Fabless Device Model Using TCAD Tools: from Bipolar Transistor Formation to I-V Characteristics Extraction

This paper describes the analysis of processes used in microand nanoelectronic device manufacturing. It also presents an exemplary and novel laboratory exercise in which an epitaxial planar n + pn bipolar transistor with junction isolation is illustrated and analyzed stepbystep. Only seven photolith...

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Bibliographic Details
Main Authors: Vaidotas Barzdenas, Gediminas Grazulevicius, John Liobe, Aleksandr Vasjanov, Leonid Kladovscikov
Format: Article
Language:English
Published: Universidad Nacional de Colombia 2021-05-01
Series:Ingeniería e Investigación
Subjects:
electronics engineering education
laboratory learning environment
learning technology
tcad tools
Online Access:https://revistas.unal.edu.co/index.php/ingeinv/article/view/88685

Internet

https://revistas.unal.edu.co/index.php/ingeinv/article/view/88685

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