A Simple Method to Validate Power Loss in Medium Voltage SiC MOSFETs and Schottky Diodes Operating in a Three-Phase Inverter

This paper presents an original method of power loss validation in medium-voltage SiC MOSFET (metal–oxide–semiconductor field-effect transistor) modules of a three-phase inverter. The base of this method is a correct description of the on-state performance of the diodes and the transistors in a PWM...

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Main Authors: Jacek Rąbkowski, Hubert Skoneczny, Rafał Kopacz, Przemysław Trochimiuk, Grzegorz Wrona
Format: Article
Language:English
Published: MDPI AG 2020-09-01
Series:Energies
Subjects:
Online Access:https://www.mdpi.com/1996-1073/13/18/4773
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author Jacek Rąbkowski
Hubert Skoneczny
Rafał Kopacz
Przemysław Trochimiuk
Grzegorz Wrona
author_facet Jacek Rąbkowski
Hubert Skoneczny
Rafał Kopacz
Przemysław Trochimiuk
Grzegorz Wrona
author_sort Jacek Rąbkowski
collection DOAJ
description This paper presents an original method of power loss validation in medium-voltage SiC MOSFET (metal–oxide–semiconductor field-effect transistor) modules of a three-phase inverter. The base of this method is a correct description of the on-state performance of the diodes and the transistors in a PWM (pulse width modulation)-controlled inverter phase leg. Combined electro-thermal calculations are applied to precisely estimate the losses in the power devices and then, to find the suitable circuit parameters of a test circuit to emulate these conditions. A simple square-wave-controlled half-bridge with an inductive load enables the electrical and thermal stresses comparable to these in the inverter, and moreover, provided equations that confirmed the possibility of balancing the load between the diodes and the transistors. The circuit with 3.3 kV SiC MOSFETs was tested to verify the impact of selected parameters on power losses with the main focus on duty ratio. The same module was applied, in addition to an inductive load (3 × 112 μH) and two sets of DC-link capacitors (750 μF), to validate a phase leg of a 220 kVA inverter. In spite of a significantly apparent power, the active power delivered from the DC supply settled around 1 kW, which was enough to emulate 390 W of losses in two transistors and diodes.
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spelling doaj.art-3c30a7ff81d347439bb46a71107b19a32023-11-20T13:33:38ZengMDPI AGEnergies1996-10732020-09-011318477310.3390/en13184773A Simple Method to Validate Power Loss in Medium Voltage SiC MOSFETs and Schottky Diodes Operating in a Three-Phase InverterJacek Rąbkowski0Hubert Skoneczny1Rafał Kopacz2Przemysław Trochimiuk3Grzegorz Wrona4Institute of Control and Industrial Electronics, Warsaw University of Technology, 00-662 Warsaw, PolandInstitute of Control and Industrial Electronics, Warsaw University of Technology, 00-662 Warsaw, PolandInstitute of Control and Industrial Electronics, Warsaw University of Technology, 00-662 Warsaw, PolandInstitute of Control and Industrial Electronics, Warsaw University of Technology, 00-662 Warsaw, PolandInstitute of Control and Industrial Electronics, Warsaw University of Technology, 00-662 Warsaw, PolandThis paper presents an original method of power loss validation in medium-voltage SiC MOSFET (metal–oxide–semiconductor field-effect transistor) modules of a three-phase inverter. The base of this method is a correct description of the on-state performance of the diodes and the transistors in a PWM (pulse width modulation)-controlled inverter phase leg. Combined electro-thermal calculations are applied to precisely estimate the losses in the power devices and then, to find the suitable circuit parameters of a test circuit to emulate these conditions. A simple square-wave-controlled half-bridge with an inductive load enables the electrical and thermal stresses comparable to these in the inverter, and moreover, provided equations that confirmed the possibility of balancing the load between the diodes and the transistors. The circuit with 3.3 kV SiC MOSFETs was tested to verify the impact of selected parameters on power losses with the main focus on duty ratio. The same module was applied, in addition to an inductive load (3 × 112 μH) and two sets of DC-link capacitors (750 μF), to validate a phase leg of a 220 kVA inverter. In spite of a significantly apparent power, the active power delivered from the DC supply settled around 1 kW, which was enough to emulate 390 W of losses in two transistors and diodes.https://www.mdpi.com/1996-1073/13/18/4773medium voltageinverterSiC MOSFETSchottky diodespower losses
spellingShingle Jacek Rąbkowski
Hubert Skoneczny
Rafał Kopacz
Przemysław Trochimiuk
Grzegorz Wrona
A Simple Method to Validate Power Loss in Medium Voltage SiC MOSFETs and Schottky Diodes Operating in a Three-Phase Inverter
Energies
medium voltage
inverter
SiC MOSFET
Schottky diodes
power losses
title A Simple Method to Validate Power Loss in Medium Voltage SiC MOSFETs and Schottky Diodes Operating in a Three-Phase Inverter
title_full A Simple Method to Validate Power Loss in Medium Voltage SiC MOSFETs and Schottky Diodes Operating in a Three-Phase Inverter
title_fullStr A Simple Method to Validate Power Loss in Medium Voltage SiC MOSFETs and Schottky Diodes Operating in a Three-Phase Inverter
title_full_unstemmed A Simple Method to Validate Power Loss in Medium Voltage SiC MOSFETs and Schottky Diodes Operating in a Three-Phase Inverter
title_short A Simple Method to Validate Power Loss in Medium Voltage SiC MOSFETs and Schottky Diodes Operating in a Three-Phase Inverter
title_sort simple method to validate power loss in medium voltage sic mosfets and schottky diodes operating in a three phase inverter
topic medium voltage
inverter
SiC MOSFET
Schottky diodes
power losses
url https://www.mdpi.com/1996-1073/13/18/4773
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