New Heuristic Algorithm for Low Energy Mapping for 2.5-D Integration

New Heuristic Algorithm for Low Energy Mapping for 2.5-D Integration

A chiplet placement algorithm for 2.5-D IC integration on an interposer is discussed in this paper. Inspired by the NoC (network-on-chip) mapping problem, we propose a novel chiplet placement algorithm called the CCEOA (chiplet communication energy optimization algorithm), which takes into account t...

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Bibliographic Details
Main Authors: Haiyan Sun, Xinwei Peng, Dongqing Cang, Jicong Zhao, Yanhua Liu
Format: Article
Language:English
Published: MDPI AG 2022-06-01
Series:Electronics
Subjects:
2.5-D IC
chiplet placement
low communication consumption
secondary local exploration
Online Access:https://www.mdpi.com/2079-9292/11/12/1817

Internet

https://www.mdpi.com/2079-9292/11/12/1817

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